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X-Microsoft-Antispam-Message-Info: y45eD+JlTD1MigszjZ2MRcQKv3hj1f/8IGXAbOUz3tYf2cPs3/w7xXe2NHSZ6kuqF6jHNKP4+GdPZkuG5v0OmosOq08leMmbw5/eQY3wytYu0nRolZC1ksNibMJSq7YBXjH3Pz4VP853ecDndAONyHDCSz5dPvlGMi/UBcqxZzvj2jY/MQBTG9Bi92CiaAd6BHYIAacIK/aXGubObDlaHHZxCoW38l6/ZavHBKbADFot9XrXv+5EXIPQ7TEO39HwwRYuRBNPjGCG42eWrVu/NF9TCBsgTFBy/muWT9qx5quuhYqKSxXCWQ4dAXubAzFYTLJAPhNyheYJk07MUA8QAh6z1WS6GaNIuxDUlLhKvjWQcUpfL7Pb7yv+0kqWk3VgjwkG+qZeQRK25GslpXzoG+ZsbVI3XQNSlSEJKpAnNg9ylJiRuMcHbK9tjePqc4EWI9QmUZqqdzdtv15wNiOHdttpGg8YckOVIS9LsXStfMp5PW4IqvtPOjavCgTWyAtSGz7iDjlDnyqYrqaX5RkkqjzLOqU6B7q3j5HEimrcOnI= X-MS-Exchange-AntiSpam-MessageData: wbo+Z5MnxyQtXDks6KG+CdcOqXca7w8W/CniLnX+ud08lilt8ePYAsXR0ucEMs1Cl7p0SKfQBg6BRWEqEtuxvopta2MX+y5d/gXZXSURn5AhjZiDvw+HOcn6XQ5+GFfomIn6NN/pixnou6iNHgn0rg== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e66de7f4-b9da-4e6c-db57-08d7b512a6d7 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Feb 2020 08:06:41.1216 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: uQ4pzeWZLINFH0YYfskFBJNq+f4UoRXyA8Q7j+5xjYJY/qSJkucEiBvNYcFxBkt4XBWUB/do8odHvAzzvTX9UQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6401 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200219_000644_531557_7BF992EC X-CRM114-Status: GOOD ( 14.38 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [40.107.21.63 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 MSGID_FROM_MTA_HEADER Message-Id was added by a relay X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peng Fan , abel.vesa@nxp.com, Anson.Huang@nxp.com, linux-kernel@vger.kernel.org, linux-imx@nxp.com, kernel@pengutronix.de, festevam@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Peng Fan When cpu runs in HSRUN mode, cpuidle is not allowed to run into Stop mode. So add imx7ulp_get_mode to get thr cpu run mode, and use WAIT mode instead, when cpu in HSRUN mode. Signed-off-by: Peng Fan --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/cpuidle-imx7ulp.c | 14 +++++++++++--- arch/arm/mach-imx/pm-imx7ulp.c | 10 ++++++++++ 3 files changed, 22 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 5aa5796cff0e..db542da4fe67 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -104,6 +104,7 @@ void imx6_set_int_mem_clk_lpm(bool enable); void imx6sl_set_wait_clk(bool enter); int imx_mmdc_get_ddr_type(void); int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode); +u32 imx7ulp_get_mode(void); void imx_cpu_die(unsigned int cpu); int imx_cpu_kill(unsigned int cpu); diff --git a/arch/arm/mach-imx/cpuidle-imx7ulp.c b/arch/arm/mach-imx/cpuidle-imx7ulp.c index ca86c967d19e..e7009d10b331 100644 --- a/arch/arm/mach-imx/cpuidle-imx7ulp.c +++ b/arch/arm/mach-imx/cpuidle-imx7ulp.c @@ -15,10 +15,18 @@ static int imx7ulp_enter_wait(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - if (index == 1) + u32 mode; + + if (index == 1) { imx7ulp_set_lpm(ULP_PM_WAIT); - else - imx7ulp_set_lpm(ULP_PM_STOP); + } else { + mode = imx7ulp_get_mode(); + + if (mode == 3) + imx7ulp_set_lpm(ULP_PM_WAIT); + else + imx7ulp_set_lpm(ULP_PM_STOP); + } cpu_do_idle(); diff --git a/arch/arm/mach-imx/pm-imx7ulp.c b/arch/arm/mach-imx/pm-imx7ulp.c index 393faf1e8382..1410ccfc71bd 100644 --- a/arch/arm/mach-imx/pm-imx7ulp.c +++ b/arch/arm/mach-imx/pm-imx7ulp.c @@ -63,6 +63,16 @@ int imx7ulp_set_lpm(enum ulp_cpu_pwr_mode mode) return 0; } +u32 imx7ulp_get_mode(void) +{ + u32 mode; + + mode = readl_relaxed(smc1_base + SMC_PMCTRL) & BM_PMCTRL_RUNM; + mode >>= BP_PMCTRL_RUNM; + + return mode; +} + void __init imx7ulp_pm_init(void) { struct device_node *np;