| Message ID | 1583217512-27994-2-git-send-email-kuldeep.singh@nxp.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 035af82a5fe15ae92b273b8014dbd02518e4a4fc |
| Headers | show |
| Series | [1/2] arm64: dts: lx2160ardb: Update FSPI node properties | expand |
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index 1a5acf6..3b88e1e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -43,6 +43,21 @@ status = "okay"; }; +&fspi { + status = "okay"; + + mt35xu512aba0: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + m25p,fast-read; + spi-max-frequency = <50000000>; + reg = <0>; + spi-rx-bus-width = <8>; + spi-tx-bus-width = <8>; + }; +}; + &i2c0 { status = "okay";
lx2160a-qds has 2 micron "mt35xu512aba" flashes of size 64M each connected on A0 and B1 i.e on CS0 and CS3. Since flashes are connected on different buses, only one flash can be probed at a time. Add fspi node properties aligned with LX2160A-RDB fspi properties. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+)