| Message ID | 1583221359-9285-4-git-send-email-peng.fan@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mailbox/firmware: imx: support SCU channel type | expand |
On 03.03.20 08:42, peng.fan@nxp.com wrote: > From: Peng Fan <peng.fan@nxp.com> > > i.MX8/8X SCU MU is dedicated for communication between SCU and Cortex-A > cores from hardware design, and could not be reused for other purpose. > > Per i.MX8/8X Reference mannual, Chapter "12.9.2.3.2 Messaging Examples", > Passing short messages: Transmit register(s) can be used to pass > short messages from one to four words in length. For example, when > a four-word message is desired, only one of the registers needs to > have its corresponding interrupt enable bit set at the receiver side; > the message’s first three words are written to the registers whose > interrupt is masked, and the fourth word is written to the other > register (which triggers an interrupt at the receiver side). > > i.MX8/8X SCU firmware IPC is an implementation of passing short > messages. But current imx-mailbox driver only support one word > message, i.MX8/8X linux side firmware has to request four TX > and four RX to support IPC to SCU firmware. This is low efficent > and more interrupts triggered compared with one TX and > one RX. > > To make SCU MU work, > - parse the size of msg. > - Only enable TR0/RR0 interrupt for transmit/receive message. > - For TX/RX, only support one TX channel and one RX channel > - For RX, support receive msg larger than 4 u32 words. > - Support 6 channels, TX0/RX0/RXDB[0-3], not support TXDB. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> > --- > V5: > Code style cleanup > Add more debug msg > Drop __packed aligned > idx santity check in scu xlate > > V4: > Added separate chans init and xlate function for SCU MU > Limit chans to TX0/RX0/RXDB[0-3], max 6 chans. > Santity check to msg size > > V3: > Added scu type tx/rx and SCU MU type > > drivers/mailbox/imx-mailbox.c | 134 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 134 insertions(+) > > diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c > index df6c4ecd913c..3f28c769a1c1 100644 > --- a/drivers/mailbox/imx-mailbox.c > +++ b/drivers/mailbox/imx-mailbox.c > @@ -4,6 +4,7 @@ > */ > > #include <linux/clk.h> > +#include <linux/firmware/imx/ipc.h> > #include <linux/interrupt.h> > #include <linux/io.h> > #include <linux/kernel.h> > @@ -27,6 +28,8 @@ > #define IMX_MU_xCR_GIRn(x) BIT(16 + (3 - (x))) > > #define IMX_MU_CHANS 16 > +/* TX0/RX0/RXDB[0-3] */ > +#define IMX_MU_SCU_CHANS 6 > #define IMX_MU_CHAN_NAME_SIZE 20 > > enum imx_mu_chan_type { > @@ -36,6 +39,11 @@ enum imx_mu_chan_type { > IMX_MU_TYPE_RXDB, /* Rx doorbell */ > }; > > +struct imx_sc_rpc_msg_max { > + struct imx_sc_rpc_msg hdr; > + u32 data[7]; > +}; > + > struct imx_mu_con_priv { > unsigned int idx; > char irq_desc[IMX_MU_CHAN_NAME_SIZE]; > @@ -134,6 +142,63 @@ static int imx_mu_generic_rx(struct imx_mu_priv *priv, > return 0; > } > > +static int imx_mu_scu_tx(struct imx_mu_priv *priv, > + struct imx_mu_con_priv *cp, > + void *data) > +{ > + struct imx_sc_rpc_msg_max *msg = data; > + u32 *arg = data; > + int i; > + > + switch (cp->type) { > + case IMX_MU_TYPE_TX: > + if (msg->hdr.size > sizeof(*msg)) { > + /* > + * The real message size can be different to > + * struct imx_sc_rpc_msg_max size > + */ > + dev_err(priv->dev, "Exceed max msg size (%li) on TX, got: %i\n", sizeof(*msg), msg->hdr.size); > + return -EINVAL; > + } > + > + for (i = 0; i < msg->hdr.size; i++) > + imx_mu_write(priv, *arg++, priv->dcfg->xTR[i % 4]); > + > + imx_mu_xcr_rmw(priv, IMX_MU_xCR_TIEn(cp->idx), 0); > + break; > + default: > + dev_warn_ratelimited(priv->dev, "Send data on wrong channel type: %d\n", cp->type); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int imx_mu_scu_rx(struct imx_mu_priv *priv, > + struct imx_mu_con_priv *cp) > +{ > + struct imx_sc_rpc_msg_max msg; > + u32 *data = (u32 *)&msg; > + int i; > + > + imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_RIEn(0)); > + *data++ = imx_mu_read(priv, priv->dcfg->xRR[0]); > + > + if (msg.hdr.size > sizeof(msg)) { > + dev_err(priv->dev, "Exceed max msg size (%li) on RX, got: %i\n", > + sizeof(msg), msg.hdr.size); > + return -EINVAL; > + } > + > + for (i = 1; i < msg.hdr.size; i++) > + *data++ = imx_mu_read(priv, priv->dcfg->xRR[i % 4]); > + > + imx_mu_xcr_rmw(priv, IMX_MU_xCR_RIEn(0), 0); > + mbox_chan_received_data(cp->chan, (void *)&msg); > + > + return 0; > +} > + > static void imx_mu_txdb_tasklet(unsigned long data) > { > struct imx_mu_con_priv *cp = (struct imx_mu_con_priv *)data; > @@ -263,6 +328,42 @@ static const struct mbox_chan_ops imx_mu_ops = { > .shutdown = imx_mu_shutdown, > }; > > +static struct mbox_chan *imx_mu_scu_xlate(struct mbox_controller *mbox, > + const struct of_phandle_args *sp) > +{ > + u32 type, idx, chan; > + > + if (sp->args_count != 2) { > + dev_err(mbox->dev, "Invalid argument count %d\n", sp->args_count); > + return ERR_PTR(-EINVAL); > + } > + > + type = sp->args[0]; /* channel type */ > + idx = sp->args[1]; /* index */ > + > + switch (type) { > + case IMX_MU_TYPE_TX: > + case IMX_MU_TYPE_RX: > + if (idx != 0) > + dev_err(mbox->dev, "Invalid chan idx: %d\n", idx); > + chan = type; > + break; > + case IMX_MU_TYPE_RXDB: > + chan = 2 + idx; > + break; > + default: > + dev_err(mbox->dev, "Invalid chan type: %d\n", type); > + return NULL; > + } > + > + if (chan >= mbox->num_chans) { > + dev_err(mbox->dev, "Not supported channel number: %d. (type: %d, idx: %d)\n", chan, type, idx); > + return ERR_PTR(-EINVAL); > + } > + > + return &mbox->chans[chan]; > +} > + > static struct mbox_chan * imx_mu_xlate(struct mbox_controller *mbox, > const struct of_phandle_args *sp) > { > @@ -310,6 +411,28 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv) > imx_mu_write(priv, 0, priv->dcfg->xCR); > } > > +static void imx_mu_init_scu(struct imx_mu_priv *priv) > +{ > + unsigned int i; > + > + for (i = 0; i < IMX_MU_SCU_CHANS; i++) { > + struct imx_mu_con_priv *cp = &priv->con_priv[i]; > + > + cp->idx = i < 2 ? 0 : i - 2; > + cp->type = i < 2 ? i : IMX_MU_TYPE_RXDB; > + cp->chan = &priv->mbox_chans[i]; > + priv->mbox_chans[i].con_priv = cp; > + snprintf(cp->irq_desc, sizeof(cp->irq_desc), > + "imx_mu_chan[%i-%i]", cp->type, cp->idx); > + } > + > + priv->mbox.num_chans = IMX_MU_SCU_CHANS; > + priv->mbox.of_xlate = imx_mu_scu_xlate; > + > + /* Set default MU configuration */ > + imx_mu_write(priv, 0, priv->dcfg->xCR); > +} > + > static int imx_mu_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -396,9 +519,20 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx7ulp = { > .xCR = 0x64, > }; > > +static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = { > + .tx = imx_mu_scu_tx, > + .rx = imx_mu_scu_rx, > + .init = imx_mu_init_scu, > + .xTR = {0x0, 0x4, 0x8, 0xc}, > + .xRR = {0x10, 0x14, 0x18, 0x1c}, > + .xSR = 0x20, > + .xCR = 0x24, > +}; > + > static const struct of_device_id imx_mu_dt_ids[] = { > { .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp }, > { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx }, > + { .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu }, > { }, > }; > MODULE_DEVICE_TABLE(of, imx_mu_dt_ids); > Kind regards, Oleksij Rempel
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on 770fbb32d34e5d6298cc2be590c9d2fd6069aa17]
url: https://github.com/0day-ci/linux/commits/peng-fan-nxp-com/mailbox-firmware-imx-support-SCU-channel-type/20200303-201748
base: 770fbb32d34e5d6298cc2be590c9d2fd6069aa17
config: m68k-allmodconfig (attached as .config)
compiler: m68k-linux-gcc (GCC) 7.5.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.5.0 make.cross ARCH=m68k
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/linux/device.h:15:0,
from include/linux/firmware/imx/ipc.h:11,
from drivers//mailbox/imx-mailbox.c:7:
drivers//mailbox/imx-mailbox.c: In function 'imx_mu_scu_tx':
>> drivers//mailbox/imx-mailbox.c:160:23: warning: format '%li' expects argument of type 'long int', but argument 3 has type 'unsigned int' [-Wformat=]
dev_err(priv->dev, "Exceed max msg size (%li) on TX, got: %i\n", sizeof(*msg), msg->hdr.size);
^
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
#define dev_fmt(fmt) fmt
^~~
>> drivers//mailbox/imx-mailbox.c:160:4: note: in expansion of macro 'dev_err'
dev_err(priv->dev, "Exceed max msg size (%li) on TX, got: %i\n", sizeof(*msg), msg->hdr.size);
^~~~~~~
drivers//mailbox/imx-mailbox.c: In function 'imx_mu_scu_rx':
drivers//mailbox/imx-mailbox.c:188:22: warning: format '%li' expects argument of type 'long int', but argument 3 has type 'unsigned int' [-Wformat=]
dev_err(priv->dev, "Exceed max msg size (%li) on RX, got: %i\n",
^
include/linux/dev_printk.h:19:22: note: in definition of macro 'dev_fmt'
#define dev_fmt(fmt) fmt
^~~
drivers//mailbox/imx-mailbox.c:188:3: note: in expansion of macro 'dev_err'
dev_err(priv->dev, "Exceed max msg size (%li) on RX, got: %i\n",
^~~~~~~
vim +/dev_err +160 drivers//mailbox/imx-mailbox.c
144
145 static int imx_mu_scu_tx(struct imx_mu_priv *priv,
146 struct imx_mu_con_priv *cp,
147 void *data)
148 {
149 struct imx_sc_rpc_msg_max *msg = data;
150 u32 *arg = data;
151 int i;
152
153 switch (cp->type) {
154 case IMX_MU_TYPE_TX:
155 if (msg->hdr.size > sizeof(*msg)) {
156 /*
157 * The real message size can be different to
158 * struct imx_sc_rpc_msg_max size
159 */
> 160 dev_err(priv->dev, "Exceed max msg size (%li) on TX, got: %i\n", sizeof(*msg), msg->hdr.size);
161 return -EINVAL;
162 }
163
164 for (i = 0; i < msg->hdr.size; i++)
165 imx_mu_write(priv, *arg++, priv->dcfg->xTR[i % 4]);
166
167 imx_mu_xcr_rmw(priv, IMX_MU_xCR_TIEn(cp->idx), 0);
168 break;
169 default:
170 dev_warn_ratelimited(priv->dev, "Send data on wrong channel type: %d\n", cp->type);
171 return -EINVAL;
172 }
173
174 return 0;
175 }
176
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.c index df6c4ecd913c..3f28c769a1c1 100644 --- a/drivers/mailbox/imx-mailbox.c +++ b/drivers/mailbox/imx-mailbox.c @@ -4,6 +4,7 @@ */ #include <linux/clk.h> +#include <linux/firmware/imx/ipc.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/kernel.h> @@ -27,6 +28,8 @@ #define IMX_MU_xCR_GIRn(x) BIT(16 + (3 - (x))) #define IMX_MU_CHANS 16 +/* TX0/RX0/RXDB[0-3] */ +#define IMX_MU_SCU_CHANS 6 #define IMX_MU_CHAN_NAME_SIZE 20 enum imx_mu_chan_type { @@ -36,6 +39,11 @@ enum imx_mu_chan_type { IMX_MU_TYPE_RXDB, /* Rx doorbell */ }; +struct imx_sc_rpc_msg_max { + struct imx_sc_rpc_msg hdr; + u32 data[7]; +}; + struct imx_mu_con_priv { unsigned int idx; char irq_desc[IMX_MU_CHAN_NAME_SIZE]; @@ -134,6 +142,63 @@ static int imx_mu_generic_rx(struct imx_mu_priv *priv, return 0; } +static int imx_mu_scu_tx(struct imx_mu_priv *priv, + struct imx_mu_con_priv *cp, + void *data) +{ + struct imx_sc_rpc_msg_max *msg = data; + u32 *arg = data; + int i; + + switch (cp->type) { + case IMX_MU_TYPE_TX: + if (msg->hdr.size > sizeof(*msg)) { + /* + * The real message size can be different to + * struct imx_sc_rpc_msg_max size + */ + dev_err(priv->dev, "Exceed max msg size (%li) on TX, got: %i\n", sizeof(*msg), msg->hdr.size); + return -EINVAL; + } + + for (i = 0; i < msg->hdr.size; i++) + imx_mu_write(priv, *arg++, priv->dcfg->xTR[i % 4]); + + imx_mu_xcr_rmw(priv, IMX_MU_xCR_TIEn(cp->idx), 0); + break; + default: + dev_warn_ratelimited(priv->dev, "Send data on wrong channel type: %d\n", cp->type); + return -EINVAL; + } + + return 0; +} + +static int imx_mu_scu_rx(struct imx_mu_priv *priv, + struct imx_mu_con_priv *cp) +{ + struct imx_sc_rpc_msg_max msg; + u32 *data = (u32 *)&msg; + int i; + + imx_mu_xcr_rmw(priv, 0, IMX_MU_xCR_RIEn(0)); + *data++ = imx_mu_read(priv, priv->dcfg->xRR[0]); + + if (msg.hdr.size > sizeof(msg)) { + dev_err(priv->dev, "Exceed max msg size (%li) on RX, got: %i\n", + sizeof(msg), msg.hdr.size); + return -EINVAL; + } + + for (i = 1; i < msg.hdr.size; i++) + *data++ = imx_mu_read(priv, priv->dcfg->xRR[i % 4]); + + imx_mu_xcr_rmw(priv, IMX_MU_xCR_RIEn(0), 0); + mbox_chan_received_data(cp->chan, (void *)&msg); + + return 0; +} + static void imx_mu_txdb_tasklet(unsigned long data) { struct imx_mu_con_priv *cp = (struct imx_mu_con_priv *)data; @@ -263,6 +328,42 @@ static const struct mbox_chan_ops imx_mu_ops = { .shutdown = imx_mu_shutdown, }; +static struct mbox_chan *imx_mu_scu_xlate(struct mbox_controller *mbox, + const struct of_phandle_args *sp) +{ + u32 type, idx, chan; + + if (sp->args_count != 2) { + dev_err(mbox->dev, "Invalid argument count %d\n", sp->args_count); + return ERR_PTR(-EINVAL); + } + + type = sp->args[0]; /* channel type */ + idx = sp->args[1]; /* index */ + + switch (type) { + case IMX_MU_TYPE_TX: + case IMX_MU_TYPE_RX: + if (idx != 0) + dev_err(mbox->dev, "Invalid chan idx: %d\n", idx); + chan = type; + break; + case IMX_MU_TYPE_RXDB: + chan = 2 + idx; + break; + default: + dev_err(mbox->dev, "Invalid chan type: %d\n", type); + return NULL; + } + + if (chan >= mbox->num_chans) { + dev_err(mbox->dev, "Not supported channel number: %d. (type: %d, idx: %d)\n", chan, type, idx); + return ERR_PTR(-EINVAL); + } + + return &mbox->chans[chan]; +} + static struct mbox_chan * imx_mu_xlate(struct mbox_controller *mbox, const struct of_phandle_args *sp) { @@ -310,6 +411,28 @@ static void imx_mu_init_generic(struct imx_mu_priv *priv) imx_mu_write(priv, 0, priv->dcfg->xCR); } +static void imx_mu_init_scu(struct imx_mu_priv *priv) +{ + unsigned int i; + + for (i = 0; i < IMX_MU_SCU_CHANS; i++) { + struct imx_mu_con_priv *cp = &priv->con_priv[i]; + + cp->idx = i < 2 ? 0 : i - 2; + cp->type = i < 2 ? i : IMX_MU_TYPE_RXDB; + cp->chan = &priv->mbox_chans[i]; + priv->mbox_chans[i].con_priv = cp; + snprintf(cp->irq_desc, sizeof(cp->irq_desc), + "imx_mu_chan[%i-%i]", cp->type, cp->idx); + } + + priv->mbox.num_chans = IMX_MU_SCU_CHANS; + priv->mbox.of_xlate = imx_mu_scu_xlate; + + /* Set default MU configuration */ + imx_mu_write(priv, 0, priv->dcfg->xCR); +} + static int imx_mu_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -396,9 +519,20 @@ static const struct imx_mu_dcfg imx_mu_cfg_imx7ulp = { .xCR = 0x64, }; +static const struct imx_mu_dcfg imx_mu_cfg_imx8_scu = { + .tx = imx_mu_scu_tx, + .rx = imx_mu_scu_rx, + .init = imx_mu_init_scu, + .xTR = {0x0, 0x4, 0x8, 0xc}, + .xRR = {0x10, 0x14, 0x18, 0x1c}, + .xSR = 0x20, + .xCR = 0x24, +}; + static const struct of_device_id imx_mu_dt_ids[] = { { .compatible = "fsl,imx7ulp-mu", .data = &imx_mu_cfg_imx7ulp }, { .compatible = "fsl,imx6sx-mu", .data = &imx_mu_cfg_imx6sx }, + { .compatible = "fsl,imx8-mu-scu", .data = &imx_mu_cfg_imx8_scu }, { }, }; MODULE_DEVICE_TABLE(of, imx_mu_dt_ids);