| Message ID | 1588761371-9078-3-git-send-email-amittomer25@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MMC support for S700 | expand |
On 06/05/2020 11:36, Amit Singh Tomar wrote: Hi, > DMA controller present on S700 SoC is compatible with the one on S900 > (as most of registers are same), but it has different DMA descriptor > structure where registers "fcnt" and "ctrlb" uses different encoding. > > For instance, on S900 "fcnt" starts at offset 0x0c and uses upper 12 > bits whereas on S700, it starts at offset 0x1c and uses lower 12 bits. > > This commit adds support for DMA controller present on S700. > > Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> > --- > drivers/dma/owl-dma.c | 99 ++++++++++++++++++++++++++++++++++++--------------- > 1 file changed, 70 insertions(+), 29 deletions(-) > > diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c > index b0d80a2fa383..6c2f0d0aad4c 100644 > --- a/drivers/dma/owl-dma.c > +++ b/drivers/dma/owl-dma.c > @@ -134,6 +134,11 @@ enum owl_dmadesc_offsets { > OWL_DMADESC_SIZE > }; > > +enum owl_dma_id { > + S900_DMA, > + S700_DMA, > +}; > + > /** > * struct owl_dma_lli - Link list for dma transfer > * @hw: hardware link list > @@ -200,6 +205,7 @@ struct owl_dma_vchan { > * @pchans: array of data for the physical channels > * @nr_vchans: the number of physical channels > * @vchans: array of data for the physical channels > + * @devid: device id based on OWL SoC > */ > struct owl_dma { > struct dma_device dma; > @@ -214,6 +220,7 @@ struct owl_dma { > > unsigned int nr_vchans; > struct owl_dma_vchan *vchans; > + enum owl_dma_id devid; > }; > > static void pchan_update(struct owl_dma_pchan *pchan, u32 reg, > @@ -354,6 +361,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, > struct dma_slave_config *sconfig, > bool is_cyclic) > { > + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); > u32 mode, ctrlb; > > mode = OWL_DMA_MODE_PW(0); > @@ -409,8 +417,14 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, > lli->hw[OWL_DMADESC_DADDR] = dst; > lli->hw[OWL_DMADESC_SRC_STRIDE] = 0; > lli->hw[OWL_DMADESC_DST_STRIDE] = 0; > - lli->hw[OWL_DMADESC_FLEN] = len | 1 << 20; > - lli->hw[OWL_DMADESC_CTRLB] = ctrlb; > + > + if (od->devid == S700_DMA) { > + lli->hw[OWL_DMADESC_FLEN] = len; > + lli->hw[OWL_DMADESC_CTRLB] = 1 | ctrlb; > + } else { > + lli->hw[OWL_DMADESC_FLEN] = len | 1 << 20; > + lli->hw[OWL_DMADESC_CTRLB] = ctrlb; > + } > > return 0; > } > @@ -562,26 +576,35 @@ static irqreturn_t owl_dma_interrupt(int irq, void *dev_id) > dma_writel(od, OWL_DMA_IRQ_PD0, pending); > > /* Check missed pending IRQ */ > - for (i = 0; i < od->nr_pchans; i++) { > - pchan = &od->pchans[i]; > - chan_irq_pending = pchan_readl(pchan, OWL_DMAX_INT_CTL) & > - pchan_readl(pchan, OWL_DMAX_INT_STATUS); > - > - /* Dummy read to ensure OWL_DMA_IRQ_PD0 value is updated */ > - dma_readl(od, OWL_DMA_IRQ_PD0); > + if (od->devid == S900_DMA) { You should mention (at least in the commit message) why this is needed. And please move this into a separate function, this indentation is becoming mad here. > + for (i = 0; i < od->nr_pchans; i++) { > + pchan = &od->pchans[i]; > + chan_irq_pending = pchan_readl(pchan, > + OWL_DMAX_INT_CTL) & > + pchan_readl(pchan, > + OWL_DMAX_INT_STATUS) > + ; > + > + /* Dummy read to ensure OWL_DMA_IRQ_PD0 value is > + * updated > + */ > + dma_readl(od, OWL_DMA_IRQ_PD0); > > - global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0); > + global_irq_pending = dma_readl(od, > + OWL_DMA_IRQ_PD0); > > - if (chan_irq_pending && !(global_irq_pending & BIT(i))) { > - dev_dbg(od->dma.dev, > - "global and channel IRQ pending match err\n"); > + if (chan_irq_pending && !(global_irq_pending & > + BIT(i))) { > + dev_dbg(od->dma.dev, > + "global and channel IRQ pending match err\n"); > > - /* Clear IRQ status for this pchan */ > - pchan_update(pchan, OWL_DMAX_INT_STATUS, > - 0xff, false); > + /* Clear IRQ status for this pchan */ > + pchan_update(pchan, OWL_DMAX_INT_STATUS, > + 0xff, false); > > - /* Update global IRQ pending */ > - pending |= BIT(i); > + /* Update global IRQ pending */ > + pending |= BIT(i); > + } > } > } > > @@ -720,6 +743,7 @@ static int owl_dma_resume(struct dma_chan *chan) > > static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) > { > + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); > struct owl_dma_pchan *pchan; > struct owl_dma_txd *txd; > struct owl_dma_lli *lli; > @@ -741,9 +765,15 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) > list_for_each_entry(lli, &txd->lli_list, node) { > /* Start from the next active node */ > if (lli->phys == next_lli_phy) { > - list_for_each_entry(lli, &txd->lli_list, node) > - bytes += lli->hw[OWL_DMADESC_FLEN] & > - GENMASK(19, 0); > + list_for_each_entry(lli, &txd->lli_list, node) { > + if (od->devid == S700_DMA) > + bytes += > + lli->hw[OWL_DMADESC_FLEN]; > + else > + bytes += > + lli->hw[OWL_DMADESC_FLEN] & > + GENMASK(19, 0); You should have an accessor for getting the frame len, that should avoid the insane wrapping here. Or factor this out into a helper function. Alternatively revert the if statement and continue, that saves you one level of indentation. I guess flen is limited to 20 bits anyway, so you might want to apply the 20-bit mask unconditionally. Cheers, Andre > + } > break; > } > } > @@ -756,6 +786,7 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan, > dma_cookie_t cookie, > struct dma_tx_state *state) > { > + struct owl_dma *od = to_owl_dma(chan->device); > struct owl_dma_vchan *vchan = to_owl_vchan(chan); > struct owl_dma_lli *lli; > struct virt_dma_desc *vd; > @@ -773,8 +804,13 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan, > vd = vchan_find_desc(&vchan->vc, cookie); > if (vd) { > txd = to_owl_txd(&vd->tx); > - list_for_each_entry(lli, &txd->lli_list, node) > - bytes += lli->hw[OWL_DMADESC_FLEN] & GENMASK(19, 0); > + list_for_each_entry(lli, &txd->lli_list, node) { > + if (od->devid == S700_DMA) > + bytes += lli->hw[OWL_DMADESC_FLEN]; > + else > + bytes += lli->hw[OWL_DMADESC_FLEN] & > + GENMASK(19, 0); > + } > } else { > bytes = owl_dma_getbytes_chan(vchan); > } > @@ -1031,11 +1067,20 @@ static struct dma_chan *owl_dma_of_xlate(struct of_phandle_args *dma_spec, > return chan; > } > > +static const struct of_device_id owl_dma_match[] = { > + { .compatible = "actions,s900-dma", .data = (void *)S900_DMA,}, > + { .compatible = "actions,s700-dma", .data = (void *)S700_DMA,}, > + { /* sentinel */ }, > +}; > +MODULE_DEVICE_TABLE(of, owl_dma_match); > + > static int owl_dma_probe(struct platform_device *pdev) > { > struct device_node *np = pdev->dev.of_node; > struct owl_dma *od; > int ret, i, nr_channels, nr_requests; > + const struct of_device_id *of_id = > + of_match_device(owl_dma_match, &pdev->dev); > > od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); > if (!od) > @@ -1060,6 +1105,8 @@ static int owl_dma_probe(struct platform_device *pdev) > dev_info(&pdev->dev, "dma-channels %d, dma-requests %d\n", > nr_channels, nr_requests); > > + od->devid = (enum owl_dma_id)of_id->data; > + > od->nr_pchans = nr_channels; > od->nr_vchans = nr_requests; > > @@ -1192,12 +1239,6 @@ static int owl_dma_remove(struct platform_device *pdev) > return 0; > } > > -static const struct of_device_id owl_dma_match[] = { > - { .compatible = "actions,s900-dma", }, > - { /* sentinel */ } > -}; > -MODULE_DEVICE_TABLE(of, owl_dma_match); > - > static struct platform_driver owl_dma_driver = { > .probe = owl_dma_probe, > .remove = owl_dma_remove, >
Hi, Thanks for quick review > You should mention (at least in the commit message) why this is needed. > And please move this into a separate function, this indentation is > becoming mad here There is not much documented about it, and all I see is GIC crash if I keep it open for S700. Would figure out more details about it and update in next version. . > > > + for (i = 0; i < od->nr_pchans; i++) { > > + pchan = &od->pchans[i]; > > + chan_irq_pending = pchan_readl(pchan, > > + OWL_DMAX_INT_CTL) & > > + pchan_readl(pchan, > > + OWL_DMAX_INT_STATUS) > > + ; > > + > > + /* Dummy read to ensure OWL_DMA_IRQ_PD0 value is > > + * updated > > + */ > > + dma_readl(od, OWL_DMA_IRQ_PD0); > > > > - global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0); > > + global_irq_pending = dma_readl(od, > > + OWL_DMA_IRQ_PD0); > > > > - if (chan_irq_pending && !(global_irq_pending & BIT(i))) { > > - dev_dbg(od->dma.dev, > > - "global and channel IRQ pending match err\n"); > > + if (chan_irq_pending && !(global_irq_pending & > > + BIT(i))) { > > + dev_dbg(od->dma.dev, > > + "global and channel IRQ pending match err\n"); > > > > - /* Clear IRQ status for this pchan */ > > - pchan_update(pchan, OWL_DMAX_INT_STATUS, > > - 0xff, false); > > + /* Clear IRQ status for this pchan */ > > + pchan_update(pchan, OWL_DMAX_INT_STATUS, > > + 0xff, false); > > > > - /* Update global IRQ pending */ > > - pending |= BIT(i); > > + /* Update global IRQ pending */ > > + pending |= BIT(i); > > + } > > } > > } > > > > @@ -720,6 +743,7 @@ static int owl_dma_resume(struct dma_chan *chan) > > > > static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) > > { > > + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); > > struct owl_dma_pchan *pchan; > > struct owl_dma_txd *txd; > > struct owl_dma_lli *lli; > > @@ -741,9 +765,15 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) > > list_for_each_entry(lli, &txd->lli_list, node) { > > /* Start from the next active node */ > > if (lli->phys == next_lli_phy) { > > - list_for_each_entry(lli, &txd->lli_list, node) > > - bytes += lli->hw[OWL_DMADESC_FLEN] & > > - GENMASK(19, 0); > > + list_for_each_entry(lli, &txd->lli_list, node) { > > + if (od->devid == S700_DMA) > > + bytes += > > + lli->hw[OWL_DMADESC_FLEN]; > > + else > > + bytes += > > + lli->hw[OWL_DMADESC_FLEN] & > > + GENMASK(19, 0); > > You should have an accessor for getting the frame len, that should avoid > the insane wrapping here. Or factor this out into a helper function. > Alternatively revert the if statement and continue, that saves you one > level of indentation. > > I guess flen is limited to 20 bits anyway, so you might want to apply > the 20-bit mask unconditionally. Actually, on S700 flen uses 24 bits , so we should not use 20-bit mask. For accessor function, shall this be okay ? +static u32 llc_hw_flen(struct owl_dma *od, + struct owl_dma_lli *lli) +{ + u32 bit_mask; + + if (od->devid == S700_DMA) + bit_mask = 23; + else + bit_mask = 19; + + return lli->hw[OWL_DMADESC_FLEN] & GENMASK(bit_mask, 0); + +} Thanks Amit
On 06/05/2020 13:54, Amit Tomer wrote: > Hi, > > Thanks for quick review > >> You should mention (at least in the commit message) why this is needed. >> And please move this into a separate function, this indentation is >> becoming mad here > > There is not much documented about it, and all I see is GIC crash > if I keep it open for S700. Would figure out more details about it and > update in next version. What I meant is that you should mention this and the fact that you got this bit from the BSP source. > . >> >>> + for (i = 0; i < od->nr_pchans; i++) { >>> + pchan = &od->pchans[i]; >>> + chan_irq_pending = pchan_readl(pchan, >>> + OWL_DMAX_INT_CTL) & >>> + pchan_readl(pchan, >>> + OWL_DMAX_INT_STATUS) >>> + ; >>> + >>> + /* Dummy read to ensure OWL_DMA_IRQ_PD0 value is >>> + * updated >>> + */ >>> + dma_readl(od, OWL_DMA_IRQ_PD0); >>> >>> - global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0); >>> + global_irq_pending = dma_readl(od, >>> + OWL_DMA_IRQ_PD0); >>> >>> - if (chan_irq_pending && !(global_irq_pending & BIT(i))) { >>> - dev_dbg(od->dma.dev, >>> - "global and channel IRQ pending match err\n"); >>> + if (chan_irq_pending && !(global_irq_pending & >>> + BIT(i))) { >>> + dev_dbg(od->dma.dev, >>> + "global and channel IRQ pending match err\n"); >>> >>> - /* Clear IRQ status for this pchan */ >>> - pchan_update(pchan, OWL_DMAX_INT_STATUS, >>> - 0xff, false); >>> + /* Clear IRQ status for this pchan */ >>> + pchan_update(pchan, OWL_DMAX_INT_STATUS, >>> + 0xff, false); >>> >>> - /* Update global IRQ pending */ >>> - pending |= BIT(i); >>> + /* Update global IRQ pending */ >>> + pending |= BIT(i); >>> + } >>> } >>> } >>> >>> @@ -720,6 +743,7 @@ static int owl_dma_resume(struct dma_chan *chan) >>> >>> static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) >>> { >>> + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); >>> struct owl_dma_pchan *pchan; >>> struct owl_dma_txd *txd; >>> struct owl_dma_lli *lli; >>> @@ -741,9 +765,15 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) >>> list_for_each_entry(lli, &txd->lli_list, node) { >>> /* Start from the next active node */ >>> if (lli->phys == next_lli_phy) { >>> - list_for_each_entry(lli, &txd->lli_list, node) >>> - bytes += lli->hw[OWL_DMADESC_FLEN] & >>> - GENMASK(19, 0); >>> + list_for_each_entry(lli, &txd->lli_list, node) { >>> + if (od->devid == S700_DMA) >>> + bytes += >>> + lli->hw[OWL_DMADESC_FLEN]; >>> + else >>> + bytes += >>> + lli->hw[OWL_DMADESC_FLEN] & >>> + GENMASK(19, 0); >> >> You should have an accessor for getting the frame len, that should avoid >> the insane wrapping here. Or factor this out into a helper function. >> Alternatively revert the if statement and continue, that saves you one >> level of indentation. >> >> I guess flen is limited to 20 bits anyway, so you might want to apply >> the 20-bit mask unconditionally. > > Actually, on S700 flen uses 24 bits , so we should not use 20-bit mask. I think it *can* use 24 bits. Where does flen come from? I guess it is less than 1 MB anyway already? It better should be, at least, since the S900 seems to have this limit. > For accessor function, shall this be okay ? Something like that. My point was that this can be much more simplified if you go with 20 bits *always*. Then you can save the first parameter and this becomes a one-liner. Cheers, Andre > +static u32 llc_hw_flen(struct owl_dma *od, > + struct owl_dma_lli *lli) > +{ > + u32 bit_mask; > + > + if (od->devid == S700_DMA) > + bit_mask = 23; > + else > + bit_mask = 19; > + > + return lli->hw[OWL_DMADESC_FLEN] & GENMASK(bit_mask, 0); > + > +} > > Thanks > Amit >
diff --git a/drivers/dma/owl-dma.c b/drivers/dma/owl-dma.c index b0d80a2fa383..6c2f0d0aad4c 100644 --- a/drivers/dma/owl-dma.c +++ b/drivers/dma/owl-dma.c @@ -134,6 +134,11 @@ enum owl_dmadesc_offsets { OWL_DMADESC_SIZE }; +enum owl_dma_id { + S900_DMA, + S700_DMA, +}; + /** * struct owl_dma_lli - Link list for dma transfer * @hw: hardware link list @@ -200,6 +205,7 @@ struct owl_dma_vchan { * @pchans: array of data for the physical channels * @nr_vchans: the number of physical channels * @vchans: array of data for the physical channels + * @devid: device id based on OWL SoC */ struct owl_dma { struct dma_device dma; @@ -214,6 +220,7 @@ struct owl_dma { unsigned int nr_vchans; struct owl_dma_vchan *vchans; + enum owl_dma_id devid; }; static void pchan_update(struct owl_dma_pchan *pchan, u32 reg, @@ -354,6 +361,7 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, struct dma_slave_config *sconfig, bool is_cyclic) { + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); u32 mode, ctrlb; mode = OWL_DMA_MODE_PW(0); @@ -409,8 +417,14 @@ static inline int owl_dma_cfg_lli(struct owl_dma_vchan *vchan, lli->hw[OWL_DMADESC_DADDR] = dst; lli->hw[OWL_DMADESC_SRC_STRIDE] = 0; lli->hw[OWL_DMADESC_DST_STRIDE] = 0; - lli->hw[OWL_DMADESC_FLEN] = len | 1 << 20; - lli->hw[OWL_DMADESC_CTRLB] = ctrlb; + + if (od->devid == S700_DMA) { + lli->hw[OWL_DMADESC_FLEN] = len; + lli->hw[OWL_DMADESC_CTRLB] = 1 | ctrlb; + } else { + lli->hw[OWL_DMADESC_FLEN] = len | 1 << 20; + lli->hw[OWL_DMADESC_CTRLB] = ctrlb; + } return 0; } @@ -562,26 +576,35 @@ static irqreturn_t owl_dma_interrupt(int irq, void *dev_id) dma_writel(od, OWL_DMA_IRQ_PD0, pending); /* Check missed pending IRQ */ - for (i = 0; i < od->nr_pchans; i++) { - pchan = &od->pchans[i]; - chan_irq_pending = pchan_readl(pchan, OWL_DMAX_INT_CTL) & - pchan_readl(pchan, OWL_DMAX_INT_STATUS); - - /* Dummy read to ensure OWL_DMA_IRQ_PD0 value is updated */ - dma_readl(od, OWL_DMA_IRQ_PD0); + if (od->devid == S900_DMA) { + for (i = 0; i < od->nr_pchans; i++) { + pchan = &od->pchans[i]; + chan_irq_pending = pchan_readl(pchan, + OWL_DMAX_INT_CTL) & + pchan_readl(pchan, + OWL_DMAX_INT_STATUS) + ; + + /* Dummy read to ensure OWL_DMA_IRQ_PD0 value is + * updated + */ + dma_readl(od, OWL_DMA_IRQ_PD0); - global_irq_pending = dma_readl(od, OWL_DMA_IRQ_PD0); + global_irq_pending = dma_readl(od, + OWL_DMA_IRQ_PD0); - if (chan_irq_pending && !(global_irq_pending & BIT(i))) { - dev_dbg(od->dma.dev, - "global and channel IRQ pending match err\n"); + if (chan_irq_pending && !(global_irq_pending & + BIT(i))) { + dev_dbg(od->dma.dev, + "global and channel IRQ pending match err\n"); - /* Clear IRQ status for this pchan */ - pchan_update(pchan, OWL_DMAX_INT_STATUS, - 0xff, false); + /* Clear IRQ status for this pchan */ + pchan_update(pchan, OWL_DMAX_INT_STATUS, + 0xff, false); - /* Update global IRQ pending */ - pending |= BIT(i); + /* Update global IRQ pending */ + pending |= BIT(i); + } } } @@ -720,6 +743,7 @@ static int owl_dma_resume(struct dma_chan *chan) static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) { + struct owl_dma *od = to_owl_dma(vchan->vc.chan.device); struct owl_dma_pchan *pchan; struct owl_dma_txd *txd; struct owl_dma_lli *lli; @@ -741,9 +765,15 @@ static u32 owl_dma_getbytes_chan(struct owl_dma_vchan *vchan) list_for_each_entry(lli, &txd->lli_list, node) { /* Start from the next active node */ if (lli->phys == next_lli_phy) { - list_for_each_entry(lli, &txd->lli_list, node) - bytes += lli->hw[OWL_DMADESC_FLEN] & - GENMASK(19, 0); + list_for_each_entry(lli, &txd->lli_list, node) { + if (od->devid == S700_DMA) + bytes += + lli->hw[OWL_DMADESC_FLEN]; + else + bytes += + lli->hw[OWL_DMADESC_FLEN] & + GENMASK(19, 0); + } break; } } @@ -756,6 +786,7 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *state) { + struct owl_dma *od = to_owl_dma(chan->device); struct owl_dma_vchan *vchan = to_owl_vchan(chan); struct owl_dma_lli *lli; struct virt_dma_desc *vd; @@ -773,8 +804,13 @@ static enum dma_status owl_dma_tx_status(struct dma_chan *chan, vd = vchan_find_desc(&vchan->vc, cookie); if (vd) { txd = to_owl_txd(&vd->tx); - list_for_each_entry(lli, &txd->lli_list, node) - bytes += lli->hw[OWL_DMADESC_FLEN] & GENMASK(19, 0); + list_for_each_entry(lli, &txd->lli_list, node) { + if (od->devid == S700_DMA) + bytes += lli->hw[OWL_DMADESC_FLEN]; + else + bytes += lli->hw[OWL_DMADESC_FLEN] & + GENMASK(19, 0); + } } else { bytes = owl_dma_getbytes_chan(vchan); } @@ -1031,11 +1067,20 @@ static struct dma_chan *owl_dma_of_xlate(struct of_phandle_args *dma_spec, return chan; } +static const struct of_device_id owl_dma_match[] = { + { .compatible = "actions,s900-dma", .data = (void *)S900_DMA,}, + { .compatible = "actions,s700-dma", .data = (void *)S700_DMA,}, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, owl_dma_match); + static int owl_dma_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct owl_dma *od; int ret, i, nr_channels, nr_requests; + const struct of_device_id *of_id = + of_match_device(owl_dma_match, &pdev->dev); od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); if (!od) @@ -1060,6 +1105,8 @@ static int owl_dma_probe(struct platform_device *pdev) dev_info(&pdev->dev, "dma-channels %d, dma-requests %d\n", nr_channels, nr_requests); + od->devid = (enum owl_dma_id)of_id->data; + od->nr_pchans = nr_channels; od->nr_vchans = nr_requests; @@ -1192,12 +1239,6 @@ static int owl_dma_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id owl_dma_match[] = { - { .compatible = "actions,s900-dma", }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, owl_dma_match); - static struct platform_driver owl_dma_driver = { .probe = owl_dma_probe, .remove = owl_dma_remove,
DMA controller present on S700 SoC is compatible with the one on S900 (as most of registers are same), but it has different DMA descriptor structure where registers "fcnt" and "ctrlb" uses different encoding. For instance, on S900 "fcnt" starts at offset 0x0c and uses upper 12 bits whereas on S700, it starts at offset 0x1c and uses lower 12 bits. This commit adds support for DMA controller present on S700. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com> --- drivers/dma/owl-dma.c | 99 ++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 70 insertions(+), 29 deletions(-)