From patchwork Tue May 12 01:57:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anshuman Khandual X-Patchwork-Id: 11541893 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 24DE792A for ; Tue, 12 May 2020 01:58:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DDEAF20746 for ; Tue, 12 May 2020 01:58:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="A0jnbqFl" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DDEAF20746 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=suii/UIv4jUack8IsTDpYe1T7rvAs1LMtsBpDFhjCAc=; b=A0j nbqFl9p2Qb4aNkY7HJgx7yCHSO6BW7dWMlHwaD7z0Cpe/tu/D+7xlWrcZqgbcXYTOSvJwxIrPMNLv K4ALSM48uQK/ZkQM5t85/m96Ho8dxXy8MUCDFlKx+blc5JDbEQfbA3VBX4yTA0NLOC3K2xlveBraT f2YVNtASzQMB+zJ4ia11py5FzFiKApqa6vNvwuqp22vrh1GrtgusYfXJd5dOgWCmXUVgHSH75D0KB aTmfycYL0RJYzGvUhLZBQTy1r04S2adN1xoH8sgmY88T2BnVkT3dXb6zyDHtWKWKtJ0FP7BV/Nwkk J8yH+By2xnDCqKsYoREiRFd/hQ5Y4zg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jYKBO-0005xm-MZ; Tue, 12 May 2020 01:58:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jYKBL-0005wc-0B for linux-arm-kernel@lists.infradead.org; Tue, 12 May 2020 01:58:08 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 17A5B1FB; Mon, 11 May 2020 18:58:06 -0700 (PDT) Received: from p8cg001049571a15.arm.com (unknown [10.163.73.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 5F9DE3F71E; Mon, 11 May 2020 18:58:02 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V3] arm64/cpufeature: Validate hypervisor capabilities during CPU hotplug Date: Tue, 12 May 2020 07:27:27 +0530 Message-Id: <1589248647-22925-1-git-send-email-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200511_185807_141115_8F19088D X-CRM114-Status: GOOD ( 16.84 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [217.140.110.172 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Anshuman Khandual , Catalin Marinas , Suzuki K Poulose , linux-kernel@vger.kernel.org, James Morse , Marc Zyngier , Will Deacon , kvmarm@lists.cs.columbia.edu MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This validates hypervisor capabilities like VMID width, IPA range for any hot plug CPU against system finalized values. KVM's view of the IPA space is used while allowing a given CPU to come up. While here, it factors out get_vmid_bits() for general use. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Rutland Cc: James Morse Cc: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.cs.columbia.edu Cc: linux-kernel@vger.kernel.org Reviewed-by: Marc Zyngier Suggested-by: Suzuki Poulose Signed-off-by: Anshuman Khandual --- Changes in V3: - Dropped "#ifdef CONFIG_KVM_ARM_HOST" per Marc - Dropped ID_AA64MMFR0_PARANGE_MASK (for now) - Updated the commit message per Marc Changes in V2: (https://patchwork.kernel.org/patch/11535359/) - Added is_hyp_mode_available() check per Marc - Moved verify_kvm_capabilities() into cpufeature.c per Marc - Added helper get_kvm_ipa_limit() to fetch kvm_ipa_limit per Marc - Renamed kvm as hyp including the commit message per Marc Changes in V1: (https://patchwork.kernel.org/patch/11532565/) arch/arm64/include/asm/cpufeature.h | 18 ++++++++++++++++ arch/arm64/include/asm/kvm_mmu.h | 2 +- arch/arm64/kernel/cpufeature.c | 33 +++++++++++++++++++++++++++++ arch/arm64/kvm/reset.c | 5 +++++ 4 files changed, 57 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index afe08251ff95..1291ad5a9ccb 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -745,6 +745,24 @@ static inline bool cpu_has_hw_af(void) extern bool cpu_has_amu_feat(int cpu); #endif +static inline unsigned int get_vmid_bits(u64 mmfr1) +{ + int vmid_bits; + + vmid_bits = cpuid_feature_extract_unsigned_field(mmfr1, + ID_AA64MMFR1_VMIDBITS_SHIFT); + if (vmid_bits == ID_AA64MMFR1_VMIDBITS_16) + return 16; + + /* + * Return the default here even if any reserved + * value is fetched from the system register. + */ + return 8; +} + +u32 get_kvm_ipa_limit(void); + #endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 30b0e8d6b895..a7137e144b97 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -416,7 +416,7 @@ static inline unsigned int kvm_get_vmid_bits(void) { int reg = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); - return (cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR1_VMIDBITS_SHIFT) == 2) ? 16 : 8; + return get_vmid_bits(reg); } /* diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9fac745aa7bb..30917fe7942a 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2181,6 +2181,36 @@ static void verify_sve_features(void) /* Add checks on other ZCR bits here if necessary */ } +#ifdef CONFIG_KVM_ARM_HOST +void verify_hyp_capabilities(void) +{ + u64 safe_mmfr1, mmfr0, mmfr1; + int parange, ipa_max; + unsigned int safe_vmid_bits, vmid_bits; + + safe_mmfr1 = read_sanitised_ftr_reg(SYS_ID_AA64MMFR1_EL1); + mmfr0 = read_cpuid(ID_AA64MMFR0_EL1); + mmfr1 = read_cpuid(ID_AA64MMFR1_EL1); + + /* Verify VMID bits */ + safe_vmid_bits = get_vmid_bits(safe_mmfr1); + vmid_bits = get_vmid_bits(mmfr1); + if (vmid_bits < safe_vmid_bits) { + pr_crit("CPU%d: VMID width mismatch\n", smp_processor_id()); + cpu_die_early(); + } + + /* Verify IPA range */ + parange = mmfr0 & 0x7; + ipa_max = id_aa64mmfr0_parange_to_phys_shift(parange); + if (ipa_max < get_kvm_ipa_limit()) { + pr_crit("CPU%d: IPA range mismatch\n", smp_processor_id()); + cpu_die_early(); + } +} +#else /* !CONFIG_KVM_ARM_HOST */ +static inline void verify_hyp_capabilities(void) { } +#endif /* CONFIG_KVM_ARM_HOST */ /* * Run through the enabled system capabilities and enable() it on this CPU. @@ -2206,6 +2236,9 @@ static void verify_local_cpu_capabilities(void) if (system_supports_sve()) verify_sve_features(); + + if (is_hyp_mode_available()) + verify_hyp_capabilities(); } void check_local_cpu_capabilities(void) diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index 30b7ea680f66..841b492ff334 100644 --- a/arch/arm64/kvm/reset.c +++ b/arch/arm64/kvm/reset.c @@ -340,6 +340,11 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) return ret; } +u32 get_kvm_ipa_limit(void) +{ + return kvm_ipa_limit; +} + void kvm_set_ipa_limit(void) { unsigned int ipa_max, pa_max, va_max, parange;