From patchwork Mon Jun 29 05:53:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anson Huang X-Patchwork-Id: 11630455 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 43EE713BD for ; Mon, 29 Jun 2020 06:08:15 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D20323128 for ; Mon, 29 Jun 2020 06:08:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="mJoh7BuN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1D20323128 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:References:In-Reply-To:Message-Id:Date:Subject:To: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=EZ+PYBqYcOGFrF4Bde7RBpaVwitqTzS0FQSANKPjxf4=; b=mJoh7BuNrGZLd19O4X2RACdkMG Irlk4+vqXQs47gjUcoZWMlP2u1ZeP3j/3xAbC7w4LMYTdHV1WA0JICcWSpVxZ/kOe5lKSLuuEk1wm ink18O4Mk4+WF686pNYTGtSfgSZhLoCV/WTGN19nNmXVT3soSgsL4MsVmslL+Vdcd3HLqmYBvX/ze kyBROdkOx0FLc5qTGtIF5oldDRBo1+lzkjfPR1HrHgxkevQ+I476KwD88nHg861JszFaUY3R7iDMH Uu1hz2ITKvlFvwtZZNQYVMQGD9T79Ez7+lHXf0e81bRubMSf2O4ZxUbYNMPvWfJNhrtsOImylAEJM QWm5LKKg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jpmvn-0003Ll-5R; Mon, 29 Jun 2020 06:06:15 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jpmvc-0003JE-Le for linux-arm-kernel@lists.infradead.org; Mon, 29 Jun 2020 06:06:05 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id D6AF51A01F6; Mon, 29 Jun 2020 08:06:03 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 084551A01A5; Mon, 29 Jun 2020 08:05:53 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 1B47B402F7; Mon, 29 Jun 2020 14:05:40 +0800 (SGT) From: Anson Huang To: linux@armlinux.org.uk, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, oleksandr.suvorov@toradex.com, stefan.agner@toradex.com, arnd@arndb.de, peng.fan@nxp.com, abel.vesa@nxp.com, aisheng.dong@nxp.com, fugang.duan@nxp.com, daniel.baluta@nxp.com, yuehaibing@huawei.com, sfr@canb.auug.org.au, viro@zeniv.linux.org.uk, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH V3 03/10] ARM: imx: Select MXC_CLK for each SoC Date: Mon, 29 Jun 2020 13:53:55 +0800 Message-Id: <1593410042-10598-4-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593410042-10598-1-git-send-email-Anson.Huang@nxp.com> References: <1593410042-10598-1-git-send-email-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [92.121.34.13 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux-imx@nxp.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org i.MX common clock drivers may support module build, so it is NOT selected by default, for ARCH_MXC ARMv7 platforms, need to select it manually in each SoC to make build pass. Signed-off-by: Anson Huang --- Changes since V2: - manually select the MXC_CLK in each SoC instead of selecting it for ARCH_MXC. --- arch/arm/mach-imx/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e7d7b90..a465c0f 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -58,6 +58,7 @@ config SOC_IMX21 select CPU_ARM926T select IMX_HAVE_IOMUX_V1 select MXC_AVIC + select MXC_CLK config SOC_IMX27 bool @@ -65,17 +66,20 @@ config SOC_IMX27 select IMX_HAVE_IOMUX_V1 select MXC_AVIC select PINCTRL_IMX27 + select MXC_CLK config SOC_IMX31 bool select CPU_V6 select MXC_AVIC + select MXC_CLK config SOC_IMX35 bool select ARCH_MXC_IOMUX_V3 select MXC_AVIC select PINCTRL_IMX35 + select MXC_CLK if ARCH_MULTI_V5 @@ -419,6 +423,7 @@ config SOC_IMX1 select CPU_ARM920T select MXC_AVIC select PINCTRL_IMX1 + select MXC_CLK help This enables support for Freescale i.MX1 processor @@ -432,6 +437,7 @@ config SOC_IMX25 select CPU_ARM926T select MXC_AVIC select PINCTRL_IMX25 + select MXC_CLK help This enables support for Freescale i.MX25 processor endif @@ -444,6 +450,7 @@ config SOC_IMX5 bool select HAVE_IMX_SRC select MXC_TZIC + select MXC_CLK config SOC_IMX50 bool "i.MX50 support" @@ -477,6 +484,7 @@ config SOC_IMX6 select HAVE_IMX_MMDC select HAVE_IMX_SRC select MFD_SYSCON + select MXC_CLK select PL310_ERRATA_769419 if CACHE_L2X0 config SOC_IMX6Q @@ -561,6 +569,7 @@ config SOC_IMX7D_CM4 config SOC_IMX7D bool "i.MX7 Dual support" select PINCTRL_IMX7D + select MXC_CLK select SOC_IMX7D_CA7 if ARCH_MULTI_V7 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M select ARM_ERRATA_814220 if ARCH_MULTI_V7 @@ -571,6 +580,7 @@ config SOC_IMX7ULP bool "i.MX7ULP support" select CLKSRC_IMX_TPM select PINCTRL_IMX7ULP + select MXC_CLK select SOC_IMX7D_CA7 if ARCH_MULTI_V7 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M help @@ -580,6 +590,7 @@ config SOC_VF610 bool "Vybrid Family VF610 support" select ARM_GIC if ARCH_MULTI_V7 select PINCTRL_VF610 + select MXC_CLK help This enables support for Freescale Vybrid VF610 processor.