From patchwork Wed Dec 2 09:57:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11945527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA0E4C64E8A for ; Wed, 2 Dec 2020 09:58:23 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6D248206C0 for ; Wed, 2 Dec 2020 09:58:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6D248206C0 Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=lv/Ts0Jn6tYmSvHLcS4KYJtsEa33lh1BNN74Do3cVoc=; b=eAHk8ie5XvCtaY8w+KYFV0Wip Ly8BH9GUc97/xuefT3hq/fCtQ5bzRkS1PcI2427AS2GDP7erVXPVom2vL02LqRyvCBZWc4UZiKeun wY+/q4KvnypNrEKrBn3u35JDbFZAjv0WvbRvN5k6szlbCQ/iROt1dgZxItom5nTpKYjkkzt2V5KZ/ jydKsZf5Y0xtu1pTtnF8Qr2jSfvf4STtRvgZN1zhjPtmMMpPPjnrWupHauwNHV+KsmPD960Zp9BiG iOl86mqdduDlgbzPFKRXlE/fJotSGiQB6d59DrgE7lpecRVe28Q3TlOOQmiug5aD1VVq132zMrqWz AlhXtHGdw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kkOsx-0006ew-5d; Wed, 02 Dec 2020 09:57:19 +0000 Received: from esa3.microchip.iphmx.com ([68.232.153.233]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kkOsu-0006e9-Ld for linux-arm-kernel@lists.infradead.org; Wed, 02 Dec 2020 09:57:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1606903036; x=1638439036; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=OdCpF73TbaLabmoC1RVF4yiDtMF6ipG7iEY58ar58x8=; b=TVSw7+PYfHVBk0QBPurVfEYVo7RzcnD7Lv1qS0HC63ZYUh4jzE+VsX9R QLDv/5z/LhEWTD8aB1KknmoEbXTtS2knodna5Vn6ZwYaUvFKDOlgHjiDC omOOsxycKgFD4xWfwmVuLplJOP+d29BT0w5kprOqZcIbExw1PBcSU1O47 Ncr6xzS1pfkuweJEt01/K81dVbI4GS50gBZQPQxav9Ceni7rnkn7WkiR+ bQu+pW8V9LB7HZzHNe7TcApIbLtCAdf8pXYa85ZnUAiSafcAglQ6dwJIj FFXi4+qB6U9ne2Pcp/SeJz6nLxuWjxPNiZV4ztK5KWuybf+4VHQrdsST8 Q==; IronPort-SDR: +3KW5gWdJyWenbnbDcy7glcD+2K/owO4WupDOqLzVABEDvT3c6S2HqisyIObGSy0Ceb2qR4iFg 1l1QkgQQMhqtsgBrGnk7LWkY+NBhhqYai+PBdtqYQN5M1IA4liFIa2Z+Mod4+yjvpyeUL3oa4p r1YqceHJOmM6J2oZdiC/TNVGWC/PvbbDOezbWVAL4neNiKq6am7TssbxGf9B+cOkVKcpASm9z0 3H79OzQiEyx3AjSFR9MmxXj8XGaPjcZPXMktRncRqeqCGvSp6lqyVQwp6bcyx1gf09T+KbxTl8 Hpk= X-IronPort-AV: E=Sophos;i="5.78,386,1599548400"; d="scan'208";a="101099214" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 02 Dec 2020 02:57:15 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Wed, 2 Dec 2020 02:57:15 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Wed, 2 Dec 2020 02:57:11 -0700 From: Claudiu Beznea To: , , , Subject: [PATCH 1/2] ARM: dts: at91: sam9x60ek: remove bypass property Date: Wed, 2 Dec 2020 11:57:04 +0200 Message-ID: <1606903025-14197-2-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1606903025-14197-1-git-send-email-claudiu.beznea@microchip.com> References: <1606903025-14197-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201202_045716_941770_198210D6 X-CRM114-Status: UNSURE ( 9.32 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Marco Cardellini , sandeepsheriker.mallikarjun@microchip.com, linux-kernel@vger.kernel.org, Claudiu Beznea , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org atmel,osc-bypass property sets the bit 1 at main oscillator register. On SAM9X60 this bit is not valid according to datasheet (chapter 28.16.9 PMC Clock Generator Main Oscillator Register). Fixes: 720329e86a463 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: Marco Cardellini Signed-off-by: Claudiu Beznea Acked-by: Nicolas Ferre --- arch/arm/boot/dts/at91-sam9x60ek.dts | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/at91-sam9x60ek.dts b/arch/arm/boot/dts/at91-sam9x60ek.dts index 0e3b6147069f..73b6b1f89de9 100644 --- a/arch/arm/boot/dts/at91-sam9x60ek.dts +++ b/arch/arm/boot/dts/at91-sam9x60ek.dts @@ -578,10 +578,6 @@ }; }; /* pinctrl */ -&pmc { - atmel,osc-bypass; -}; - &pwm0 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm0_0 &pinctrl_pwm0_1 &pinctrl_pwm0_2 &pinctrl_pwm0_3>;