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Sun, 13 Dec 2020 18:28:14 -0800 (PST) From: Pingfan Liu To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] arm64/irq-gic-v3: make reschedule-ipi light weight Date: Mon, 14 Dec 2020 10:25:52 +0800 Message-Id: <1607912752-12481-3-git-send-email-kernelfans@gmail.com> X-Mailer: git-send-email 2.7.5 In-Reply-To: <1607912752-12481-1-git-send-email-kernelfans@gmail.com> References: <1607912752-12481-1-git-send-email-kernelfans@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201213_212818_048657_C59F33CC X-CRM114-Status: GOOD ( 14.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Julien Thierry , Catalin Marinas , Pingfan Liu , Marc Zyngier , Will Deacon MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org To achieve the light weight as DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) on x86, it had better treat irqnr differently at the frontend. And let IPI_RESCHEDULE call __irq_enter_raw() instead of irq_enter_rcu(). Signed-off-by: Pingfan Liu Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: Julien Thierry To: linux-arm-kernel@lists.infradead.org --- drivers/irqchip/irq-gic-v3.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index a66e0b04e42b..777f5ace6862 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -642,6 +642,9 @@ static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs) nmi_exit(); } +/* RESCHEDULE IPI hwirq nr is 0, and the only raw one */ +static unsigned long raw_interrupt_mask = 1; + static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) { u32 irqnr; @@ -654,7 +657,10 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs return; } - irq_enter_rcu(); + if (raw_interrupt_mask & 1 << irqnr) + __irq_enter_raw(); + else + irq_enter_rcu(); if (gic_prio_masking_enabled()) { gic_pmr_mask_irqs(); gic_arch_enable_irqs(); @@ -675,7 +681,10 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs WARN_ONCE(true, "Unexpected interrupt received!\n"); gic_deactivate_unhandled(irqnr); } - irq_exit_rcu(); + if (raw_interrupt_mask & 1 << irqnr) + __irq_exit_raw(); + else + irq_exit_rcu(); } static u32 gic_get_pribits(void)