From patchwork Tue Dec 29 06:31:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "andrew-sh.cheng" X-Patchwork-Id: 11992027 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY, URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F885C433E0 for ; Tue, 29 Dec 2020 06:35:30 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 33C13207D1 for ; Tue, 29 Dec 2020 06:35:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 33C13207D1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=N+si7uIyUrXxP2DXUHxFdj4IBv1Eb8tXAecoW3J8Yp8=; b=GLJOkbDJEkAjShrIfIlgo2+1j5 CwXo/coUQD8Vgbsiwtn4Tmv0VsQK7ofKI7n+IdTpu4Ox9UIJHGRS9lg6tXlKQeGvyVKxySRu+dHH6 c1WzHwd9ZlhpCNXBAtYx089VswKVbZvzprAoPMziSGLRPR1K1JEZvXXO8ksIGqGc8IkccvujQw0TF fAiQBXftPIWEN/31LmbYra9RQ4Om1FNmO6JG5UzpFxTqLY1v6/VGbEHnfJwWRJ0ESua3CpSrQUIN4 mgJqf5R6o8vfmBPPuXwNXY0ShYbTHK/LYXZc9MY0Ohf5AirjvkOSH8BVYuRRXNxNUraH0KvG5OUcq qYYUxGyw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1ku8a8-0001so-7f; Tue, 29 Dec 2020 06:34:08 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1ku8ZZ-0001ff-Ez; Tue, 29 Dec 2020 06:33:34 +0000 X-UUID: b5991c684d054db6b6b95386f5dcc12b-20201228 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=HwKWlBH5uNDCkk+f6bJEmiCk5kXu2xtSEEczEUs2zx8=; b=jUBb3CE4t3ug8PEPAxe5lbA0PaEPvk7p3b8jdZlj0y2/qK/vP9wn0+ZQDwW7Y7VZqWbfwDRx35x5ccACPG+pKdvPbWxbaOVNae4FbEl7Ns9AnBphlN3BjFzY6rkfkIuViMPl3GzxheGV9rW/E0jRBN8dP69ftQf9xLjRIzXc/50=; X-UUID: b5991c684d054db6b6b95386f5dcc12b-20201228 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 259548506; Mon, 28 Dec 2020 22:31:16 -0800 Received: from mtkmbs05n1.mediatek.inc (172.21.101.15) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 28 Dec 2020 22:31:14 -0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 29 Dec 2020 14:31:13 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Dec 2020 14:31:12 +0800 From: Andrew-sh.Cheng To: Rob Herring , Matthias Brugger , , , , Subject: [PATCH v2] arm64: dts: mediatek: Add Mediatek mt8192 cpufreq device nodes Date: Tue, 29 Dec 2020 14:31:11 +0800 Message-ID: <1609223471-24325-1-git-send-email-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201229_013333_789648_44FB3869 X-CRM114-Status: GOOD ( 10.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Andrew-sh.Cheng" , srv_heupstream@mediatek.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: "Andrew-sh.Cheng" Correct dts node name in patch v1: performance-domain This patch depends on [1] and [2]. [1]http://lists.infradead.org/pipermail/linux-mediatek/2020-November/019378.html [2]https://patchwork.kernel.org/project/linux-mediatek/patch/1607586516-6547-3-git-send-email-hector.yuan@mediatek.com/ Signed-off-by: Andrew-sh.Cheng --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 69d45c7b31f1..a907ee7e650a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -39,6 +39,7 @@ compatible = "arm,cortex-a55"; reg = <0x000>; enable-method = "psci"; + performance-domains = <&performance 0>; clock-frequency = <1701000000>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; @@ -49,6 +50,7 @@ compatible = "arm,cortex-a55"; reg = <0x100>; enable-method = "psci"; + performance-domains = <&performance 0>; clock-frequency = <1701000000>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; @@ -59,6 +61,7 @@ compatible = "arm,cortex-a55"; reg = <0x200>; enable-method = "psci"; + performance-domains = <&performance 0>; clock-frequency = <1701000000>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; @@ -69,6 +72,7 @@ compatible = "arm,cortex-a55"; reg = <0x300>; enable-method = "psci"; + performance-domains = <&performance 0>; clock-frequency = <1701000000>; next-level-cache = <&l2_0>; capacity-dmips-mhz = <530>; @@ -79,6 +83,7 @@ compatible = "arm,cortex-a76"; reg = <0x400>; enable-method = "psci"; + performance-domains = <&performance 1>; clock-frequency = <2171000000>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; @@ -89,6 +94,7 @@ compatible = "arm,cortex-a76"; reg = <0x500>; enable-method = "psci"; + performance-domains = <&performance 1>; clock-frequency = <2171000000>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; @@ -99,6 +105,7 @@ compatible = "arm,cortex-a76"; reg = <0x600>; enable-method = "psci"; + performance-domains = <&performance 1>; clock-frequency = <2171000000>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; @@ -109,6 +116,7 @@ compatible = "arm,cortex-a76"; reg = <0x700>; enable-method = "psci"; + performance-domains = <&performance 1>; clock-frequency = <2171000000>; next-level-cache = <&l2_1>; capacity-dmips-mhz = <1024>; @@ -194,6 +202,12 @@ compatible = "simple-bus"; ranges; + performance: performance-controller@0011bc00 { + compatible = "mediatek,cpufreq-hw"; + reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>; + #performance-domain-cells = <1>; + }; + gic: interrupt-controller@c000000 { compatible = "arm,gic-v3"; #interrupt-cells = <4>;