| Message ID | 1616564059-8713-2-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add one regulator used to power up pcie phy | expand |
Hi Richard, Am Mittwoch, dem 24.03.2021 um 13:34 +0800 schrieb Richard Zhu: > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, > the VREG_BYPASS bits of GPR registers should be cleared from default > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be > turned on. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index de4b2baf91e8..3248b7192ced 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -38,6 +38,12 @@ Optional properties: > The regulator will be enabled when initializing the PCIe host and > disabled either as part of the init process or when shutting down the > host. > +- vph-supply: Should specify the regulator in charge of PCIe PHY power. > + On i.MX8MQ, both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe > + PHY. In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data > + sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, the > + VREG_BYPASS bits of GPR registers should be cleared from default value 1b'1 > + to 1b'0. This description of the internal driver behavior does not belong into a DT binding description. Instead the binding should describe the function of the regulator exactly. From the datasheet I can see that there are actually 3 supplies (VPH, VP, VPTX) going into the PCIe PHY, so "regulator in charge of PCIe PHY power" doesn't seem like a very accurate description. Regards, Lucas
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index de4b2baf91e8..3248b7192ced 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -38,6 +38,12 @@ Optional properties: The regulator will be enabled when initializing the PCIe host and disabled either as part of the init process or when shutting down the host. +- vph-supply: Should specify the regulator in charge of PCIe PHY power. + On i.MX8MQ, both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe + PHY. In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data + sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, the + VREG_BYPASS bits of GPR registers should be cleared from default value 1b'1 + to 1b'0. Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries:
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, the VREG_BYPASS bits of GPR registers should be cleared from default value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be turned on. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 6 ++++++ 1 file changed, 6 insertions(+)