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Thu, 22 Apr 2021 20:30:54 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Apr 2021 20:30:54 +0000 Received: from skomatineni-linux.nvidia.com (172.20.145.6) by mail.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 22 Apr 2021 20:30:53 +0000 From: Sowjanya Komatineni To: , , , , , , , CC: , , , , , , , Subject: [RFC PATCH 1/4] firmware/psci: add support for PSCI function SET_STATE_IDLE_TIME Date: Thu, 22 Apr 2021 13:30:45 -0700 Message-ID: <1619123448-10138-2-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1619123448-10138-1-git-send-email-skomatineni@nvidia.com> References: <1619123448-10138-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5cfe9a73-b5f1-4378-481b-08d905cd8767 X-MS-TrafficTypeDiagnostic: DM5PR12MB2406: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5236; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2021 20:30:54.6723 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5cfe9a73-b5f1-4378-481b-08d905cd8767 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.35]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT064.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2406 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210422_133058_685460_1CAC5B0F X-CRM114-Status: GOOD ( 13.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds support for new PSCI function ID SET_STATE_IDLE_TIME. Some platforms use separate CPU firmware to handle all state transition based on state enter request from kernel and may need runtime state idle time of the corresponding state from kernel to pass to TF-A through PSCI. Current PSCI specification has no way of passing runtime state information from kernel to TF-A. So, this patch adds implementation for new PSCI function ID for this purpose. Signed-off-by: Sowjanya Komatineni --- drivers/firmware/psci/psci.c | 9 +++++++++ include/linux/psci.h | 1 + include/uapi/linux/psci.h | 2 ++ 3 files changed, 12 insertions(+) diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index f5bd0dc..3bd63d7 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -180,6 +180,14 @@ static int psci_0_1_cpu_suspend(u32 state, unsigned long entry_point) state, entry_point); } +static int psci_set_state_idle_time(u32 idle_time) +{ + int err; + + err = invoke_psci_fn(PSCI_1_1_FN_SET_STATE_IDLE_TIME, idle_time, 0, 0); + return psci_to_linux_errno(err); +} + static int psci_0_2_cpu_suspend(u32 state, unsigned long entry_point) { return __psci_cpu_suspend(PSCI_FN_NATIVE(0_2, CPU_SUSPEND), @@ -470,6 +478,7 @@ static void __init psci_0_2_set_functions(void) .migrate = psci_0_2_migrate, .affinity_info = psci_affinity_info, .migrate_info_type = psci_migrate_info_type, + .set_state_idle_time = psci_set_state_idle_time, }; arm_pm_restart = psci_sys_reset; diff --git a/include/linux/psci.h b/include/linux/psci.h index 4ca0060..6643bfd 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -30,6 +30,7 @@ struct psci_operations { int (*affinity_info)(unsigned long target_affinity, unsigned long lowest_affinity_level); int (*migrate_info_type)(void); + int (*set_state_idle_time)(u32 idle_time); }; extern struct psci_operations psci_ops; diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h index 2fcad1d..0013db74 100644 --- a/include/uapi/linux/psci.h +++ b/include/uapi/linux/psci.h @@ -55,6 +55,8 @@ #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) +#define PSCI_1_1_FN_SET_STATE_IDLE_TIME PSCI_0_2_FN(25) + /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff #define PSCI_0_2_POWER_STATE_ID_SHIFT 0