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Received: from szxga07-in.huawei.com ([45.249.212.35]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1liu5C-00EPNA-8L for linux-arm-kernel@lists.infradead.org; Tue, 18 May 2021 07:24:05 +0000 Received: from dggems703-chm.china.huawei.com (unknown [172.30.72.58]) by szxga07-in.huawei.com (SkyGuard) with ESMTP id 4FknVD6FmhzCtlk; Tue, 18 May 2021 15:21:08 +0800 (CST) Received: from dggema757-chm.china.huawei.com (10.1.198.199) by dggems703-chm.china.huawei.com (10.3.19.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Tue, 18 May 2021 15:23:54 +0800 Received: from localhost.localdomain (10.69.192.56) by dggema757-chm.china.huawei.com (10.1.198.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 18 May 2021 15:23:54 +0800 From: Qi Liu To: , , CC: , , , Subject: [PATCH 5/9] drivers/perf: Remove redundant macro and functions in qcom_l3_pmu.c Date: Tue, 18 May 2021 15:23:44 +0800 Message-ID: <1621322628-9945-6-git-send-email-liuqi115@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1621322628-9945-1-git-send-email-liuqi115@huawei.com> References: <1621322628-9945-1-git-send-email-liuqi115@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To dggema757-chm.china.huawei.com (10.1.198.199) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210518_002402_480490_711EB18F X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove L3CACHE_EVENT_ATTR and l3cache_pmu_event_show(), as there is a general function for this. Signed-off-by: Qi Liu --- drivers/perf/qcom_l3_pmu.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-) diff --git a/drivers/perf/qcom_l3_pmu.c b/drivers/perf/qcom_l3_pmu.c index bba0780..a163c9a 100644 --- a/drivers/perf/qcom_l3_pmu.c +++ b/drivers/perf/qcom_l3_pmu.c @@ -636,30 +636,14 @@ static const struct attribute_group qcom_l3_cache_pmu_format_group = { }; /* events */ - -static ssize_t l3cache_pmu_event_show(struct device *dev, - struct device_attribute *attr, char *page) -{ - struct perf_pmu_events_attr *pmu_attr; - - pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr); - return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id); -} - -#define L3CACHE_EVENT_ATTR(_name, _id) \ - (&((struct perf_pmu_events_attr[]) { \ - { .attr = __ATTR(_name, 0444, l3cache_pmu_event_show, NULL), \ - .id = _id, } \ - })[0].attr.attr) - static struct attribute *qcom_l3_cache_pmu_events[] = { - L3CACHE_EVENT_ATTR(cycles, L3_EVENT_CYCLES), - L3CACHE_EVENT_ATTR(read-hit, L3_EVENT_READ_HIT), - L3CACHE_EVENT_ATTR(read-miss, L3_EVENT_READ_MISS), - L3CACHE_EVENT_ATTR(read-hit-d-side, L3_EVENT_READ_HIT_D), - L3CACHE_EVENT_ATTR(read-miss-d-side, L3_EVENT_READ_MISS_D), - L3CACHE_EVENT_ATTR(write-hit, L3_EVENT_WRITE_HIT), - L3CACHE_EVENT_ATTR(write-miss, L3_EVENT_WRITE_MISS), + PMU_EVENT_ATTR_ID(cycles, L3_EVENT_CYCLES), + PMU_EVENT_ATTR_ID(read-hit, L3_EVENT_READ_HIT), + PMU_EVENT_ATTR_ID(read-miss, L3_EVENT_READ_MISS), + PMU_EVENT_ATTR_ID(read-hit-d-side, L3_EVENT_READ_HIT_D), + PMU_EVENT_ATTR_ID(read-miss-d-side, L3_EVENT_READ_MISS_D), + PMU_EVENT_ATTR_ID(write-hit, L3_EVENT_WRITE_HIT), + PMU_EVENT_ATTR_ID(write-miss, L3_EVENT_WRITE_MISS), NULL };