diff mbox series

[v2] arm64: SSBS/DIT: print SSBS and DIT bit when printing PSTATE

Message ID 1626835386-30788-1-git-send-email-zhangshaokun@hisilicon.com (mailing list archive)
State New, archived
Headers show
Series [v2] arm64: SSBS/DIT: print SSBS and DIT bit when printing PSTATE | expand

Commit Message

Shaokun Zhang July 21, 2021, 2:43 a.m. UTC
From: Lingyan Huang <huanglingyan2@huawei.com>

The current code to print PSTATE when generating backtraces does not
include SSBS bit and DIT bit, so add this information.

Cc: Vladimir Murzin <vladimir.murzin@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Lingyan Huang <huanglingyan2@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
---
ChangeLog:
v1-->v2:
    1. Address Vladimir's comment on update compat_user_mode

 arch/arm64/kernel/process.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

Comments

Vladimir Murzin July 21, 2021, 8:31 a.m. UTC | #1
On 7/21/21 3:43 AM, Shaokun Zhang wrote:
> From: Lingyan Huang <huanglingyan2@huawei.com>
> 
> The current code to print PSTATE when generating backtraces does not
> include SSBS bit and DIT bit, so add this information.
> 
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Signed-off-by: Lingyan Huang <huanglingyan2@huawei.com>
> Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
> ---
> ChangeLog:
> v1-->v2:
>     1. Address Vladimir's comment on update compat_user_mode
> 
>  arch/arm64/kernel/process.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
> index c8989b999250..3da2ad00fa0c 100644
> --- a/arch/arm64/kernel/process.c
> +++ b/arch/arm64/kernel/process.c
> @@ -163,7 +163,7 @@ static void print_pstate(struct pt_regs *regs)
>  	u64 pstate = regs->pstate;
>  
>  	if (compat_user_mode(regs)) {
> -		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
> +		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c %cPAN %cDIT %cSSBS)\n",
>  			pstate,
>  			pstate & PSR_AA32_N_BIT ? 'N' : 'n',
>  			pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
> @@ -174,12 +174,15 @@ static void print_pstate(struct pt_regs *regs)
>  			pstate & PSR_AA32_E_BIT ? "BE" : "LE",
>  			pstate & PSR_AA32_A_BIT ? 'A' : 'a',
>  			pstate & PSR_AA32_I_BIT ? 'I' : 'i',
> -			pstate & PSR_AA32_F_BIT ? 'F' : 'f');
> +			pstate & PSR_AA32_F_BIT ? 'F' : 'f',
> +			pstate & PSR_AA32_PAN_BIT ? '+' : '-',

Hmm, commit message doesn't mention PAN bit... but I leave it to maintainers.

> +			pstate & PSR_AA32_DIT_BIT ? '+' : '-',
> +			pstate & PSR_AA32_SSBS_BIT ? '+' : '-');
>  	} else {
>  		const char *btype_str = btypes[(pstate & PSR_BTYPE_MASK) >>
>  					       PSR_BTYPE_SHIFT];
>  
> -		printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO BTYPE=%s)\n",
> +		printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO %cDIT %cSSBS BTYPE=%s)\n",
>  			pstate,
>  			pstate & PSR_N_BIT ? 'N' : 'n',
>  			pstate & PSR_Z_BIT ? 'Z' : 'z',
> @@ -192,6 +195,8 @@ static void print_pstate(struct pt_regs *regs)
>  			pstate & PSR_PAN_BIT ? '+' : '-',
>  			pstate & PSR_UAO_BIT ? '+' : '-',
>  			pstate & PSR_TCO_BIT ? '+' : '-',
> +			pstate & PSR_DIT_BIT ? '+' : '-',
> +			pstate & PSR_SSBS_BIT ? '+' : '-',
>  			btype_str);
>  	}
>  }
> 

FWIW,

Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
Will Deacon July 21, 2021, 10:25 a.m. UTC | #2
On Wed, Jul 21, 2021 at 09:31:18AM +0100, Vladimir Murzin wrote:
> On 7/21/21 3:43 AM, Shaokun Zhang wrote:
> > From: Lingyan Huang <huanglingyan2@huawei.com>
> > 
> > The current code to print PSTATE when generating backtraces does not
> > include SSBS bit and DIT bit, so add this information.
> > 
> > Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Will Deacon <will@kernel.org>
> > Signed-off-by: Lingyan Huang <huanglingyan2@huawei.com>
> > Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
> > ---
> > ChangeLog:
> > v1-->v2:
> >     1. Address Vladimir's comment on update compat_user_mode
> > 
> >  arch/arm64/kernel/process.c | 11 ++++++++---
> >  1 file changed, 8 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
> > index c8989b999250..3da2ad00fa0c 100644
> > --- a/arch/arm64/kernel/process.c
> > +++ b/arch/arm64/kernel/process.c
> > @@ -163,7 +163,7 @@ static void print_pstate(struct pt_regs *regs)
> >  	u64 pstate = regs->pstate;
> >  
> >  	if (compat_user_mode(regs)) {
> > -		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
> > +		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c %cPAN %cDIT %cSSBS)\n",
> >  			pstate,
> >  			pstate & PSR_AA32_N_BIT ? 'N' : 'n',
> >  			pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
> > @@ -174,12 +174,15 @@ static void print_pstate(struct pt_regs *regs)
> >  			pstate & PSR_AA32_E_BIT ? "BE" : "LE",
> >  			pstate & PSR_AA32_A_BIT ? 'A' : 'a',
> >  			pstate & PSR_AA32_I_BIT ? 'I' : 'i',
> > -			pstate & PSR_AA32_F_BIT ? 'F' : 'f');
> > +			pstate & PSR_AA32_F_BIT ? 'F' : 'f',
> > +			pstate & PSR_AA32_PAN_BIT ? '+' : '-',
> 
> Hmm, commit message doesn't mention PAN bit... but I leave it to maintainers.

Agreed, I don't see the rationale for exposing PAN for 32-bit userspace
tasks. Please drop this part for v3.

Will
diff mbox series

Patch

diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index c8989b999250..3da2ad00fa0c 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -163,7 +163,7 @@  static void print_pstate(struct pt_regs *regs)
 	u64 pstate = regs->pstate;
 
 	if (compat_user_mode(regs)) {
-		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",
+		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c %cPAN %cDIT %cSSBS)\n",
 			pstate,
 			pstate & PSR_AA32_N_BIT ? 'N' : 'n',
 			pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',
@@ -174,12 +174,15 @@  static void print_pstate(struct pt_regs *regs)
 			pstate & PSR_AA32_E_BIT ? "BE" : "LE",
 			pstate & PSR_AA32_A_BIT ? 'A' : 'a',
 			pstate & PSR_AA32_I_BIT ? 'I' : 'i',
-			pstate & PSR_AA32_F_BIT ? 'F' : 'f');
+			pstate & PSR_AA32_F_BIT ? 'F' : 'f',
+			pstate & PSR_AA32_PAN_BIT ? '+' : '-',
+			pstate & PSR_AA32_DIT_BIT ? '+' : '-',
+			pstate & PSR_AA32_SSBS_BIT ? '+' : '-');
 	} else {
 		const char *btype_str = btypes[(pstate & PSR_BTYPE_MASK) >>
 					       PSR_BTYPE_SHIFT];
 
-		printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO BTYPE=%s)\n",
+		printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO %cDIT %cSSBS BTYPE=%s)\n",
 			pstate,
 			pstate & PSR_N_BIT ? 'N' : 'n',
 			pstate & PSR_Z_BIT ? 'Z' : 'z',
@@ -192,6 +195,8 @@  static void print_pstate(struct pt_regs *regs)
 			pstate & PSR_PAN_BIT ? '+' : '-',
 			pstate & PSR_UAO_BIT ? '+' : '-',
 			pstate & PSR_TCO_BIT ? '+' : '-',
+			pstate & PSR_DIT_BIT ? '+' : '-',
+			pstate & PSR_SSBS_BIT ? '+' : '-',
 			btype_str);
 	}
 }