| Message ID | 1634028078-2387-5-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add the imx8m pcie phy driver and imx8mm pcie support | expand |
Am Dienstag, dem 12.10.2021 um 16:41 +0800 schrieb Richard Zhu: > Add the PCIe PHY support on iMX8MM EVK boards. > And set the default reference clock mode. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > index e033d0257b5a..2d0684ac82f6 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > @@ -5,6 +5,7 @@ > > /dts-v1/; > > +#include <dt-bindings/phy/phy-imx8-pcie.h> > #include <dt-bindings/usb/pd.h> > #include "imx8mm.dtsi" > > @@ -289,6 +290,12 @@ pca6416: gpio@20 { > }; > }; > > +&pcie_phy { > + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; > + clocks = <&clk IMX8MM_CLK_DUMMY>; Please add a fixed clock DT node for the external clock generator and use this one instead of the dummy clock here. Regards, Lucas > + status = "okay"; > +}; > + > &sai3 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_sai3>;
> -----Original Message----- > From: Lucas Stach <l.stach@pengutronix.de> > Sent: Saturday, October 16, 2021 2:33 AM > To: Richard Zhu <hongxing.zhu@nxp.com>; tharvey@gateworks.com; > kishon@ti.com; vkoul@kernel.org; robh@kernel.org; > galak@kernel.crashing.org; shawnguo@kernel.org > Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com> > Subject: Re: [PATCH v3 4/9] arm64: dts: imx8mm-evk: add the pcie phy > support > > Am Dienstag, dem 12.10.2021 um 16:41 +0800 schrieb Richard Zhu: > > Add the PCIe PHY support on iMX8MM EVK boards. > > And set the default reference clock mode. > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > --- > > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > > b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > > index e033d0257b5a..2d0684ac82f6 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi > > @@ -5,6 +5,7 @@ > > > > /dts-v1/; > > > > +#include <dt-bindings/phy/phy-imx8-pcie.h> > > #include <dt-bindings/usb/pd.h> > > #include "imx8mm.dtsi" > > > > @@ -289,6 +290,12 @@ pca6416: gpio@20 { > > }; > > }; > > > > +&pcie_phy { > > + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; > > + clocks = <&clk IMX8MM_CLK_DUMMY>; > > Please add a fixed clock DT node for the external clock generator and use this > one instead of the dummy clock here. [Richard Zhu] Would be changed, and squashed to 8# patch of this series. Thanks. Best Regards Richard Zhu > > Regards, > Lucas > > > + status = "okay"; > > +}; > > + > > &sai3 { > > pinctrl-names = "default"; > > pinctrl-0 = <&pinctrl_sai3>; >
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index e033d0257b5a..2d0684ac82f6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -5,6 +5,7 @@ /dts-v1/; +#include <dt-bindings/phy/phy-imx8-pcie.h> #include <dt-bindings/usb/pd.h> #include "imx8mm.dtsi" @@ -289,6 +290,12 @@ pca6416: gpio@20 { }; }; +&pcie_phy { + fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; + clocks = <&clk IMX8MM_CLK_DUMMY>; + status = "okay"; +}; + &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>;
Add the PCIe PHY support on iMX8MM EVK boards. And set the default reference clock mode. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)