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[2/2] ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1

Message ID 1635175070-28722-3-git-send-email-fabrice.gasnier@foss.st.com (mailing list archive)
State New, archived
Headers show
Series tune the HS USB PHYs on stm32mp15 eval and disco boards | expand

Commit Message

Fabrice Gasnier Oct. 25, 2021, 3:17 p.m. UTC 
This patch adds phy tuning parameters for usbphyc port0 (USBH controller)
and usbphyc port1 (OTG controller).
Phy tuning parameters are used to adjust the phy settings to compensate
parasitics, which can be due to USB receptacle, routing, and ESD protection
component.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 5c5b1dd..e222d2d 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -375,3 +375,25 @@ 
 &usbphyc {
 	status = "okay";
 };
+
+&usbphyc_port0 {
+	st,tune-hs-dc-level = <2>;
+	st,enable-fs-rftime-tuning;
+	st,enable-hs-rftime-reduction;
+	st,trim-hs-current = <15>;
+	st,trim-hs-impedance = <1>;
+	st,tune-squelch-level = <3>;
+	st,tune-hs-rx-offset = <2>;
+	st,no-lsfs-sc;
+};
+
+&usbphyc_port1 {
+	st,tune-hs-dc-level = <2>;
+	st,enable-fs-rftime-tuning;
+	st,enable-hs-rftime-reduction;
+	st,trim-hs-current = <15>;
+	st,trim-hs-impedance = <1>;
+	st,tune-squelch-level = <3>;
+	st,tune-hs-rx-offset = <2>;
+	st,no-lsfs-sc;
+};