From patchwork Fri Dec 3 05:34:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?S3lyaWUgV3UgKOWQtOaZlyk=?= X-Patchwork-Id: 12694594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2130AC433F5 for ; Fri, 3 Dec 2021 05:45:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BYaQHyDdRhuMNmDXLzdyhu1nM0z2EalWGSPX5PEgwY8=; b=HMD4lj4bI9SNDd kvJ8AnobgM0/xfNT2GB6JLAAYpSh8dULxXT0aw0XI7u1Soyl5IF+NUIGk2A3DW0HGQmOP5ZENNSnd sI4FxAd+qGXTRv4SJsPPuhlR3n/vplch7FG85U6UPouDoIwdcn9kEbKCl/f54k+2EUTipwekF/Dw8 C8QKGJMLuA0nKdeJj2HtzQcxpOHkQnptW2y9bBCSKrSx4vpTCSwMAlmdmCdJelqOKfgUWLD7IXPjA FArEc5/7z2J8O2xZIBMxSmSMy7CJRZMM081n5yVbO/vSCBQ0WjGzQnQW964jE8dj2zwYTauVrd/Iq GNn7Neq496/khPFRTd3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt1N2-00ESYI-JS; Fri, 03 Dec 2021 05:44:32 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mt1My-00ESX4-4Y; Fri, 03 Dec 2021 05:44:29 +0000 X-UUID: b83a1852cac74a0c966a0d9c3510a8d0-20211202 X-UUID: b83a1852cac74a0c966a0d9c3510a8d0-20211202 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 870755063; Thu, 02 Dec 2021 22:44:26 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 2 Dec 2021 21:34:30 -0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 3 Dec 2021 13:34:28 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 3 Dec 2021 13:34:27 +0800 From: kyrie.wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Tomasz Figa , Matthias Brugger , "Tzung-Bi Shih" CC: , , , , , , , , , , Subject: [PATCH V1, 5/6] media: mtk-jpegdec: add output pic reorder interface Date: Fri, 3 Dec 2021 13:34:14 +0800 Message-ID: <1638509655-14296-6-git-send-email-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1638509655-14296-1-git-send-email-kyrie.wu@mediatek.com> References: <1638509655-14296-1-git-send-email-kyrie.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211202_214428_195883_11241FC4 X-CRM114-Status: GOOD ( 13.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org add output reorder func to reorder the output images to ensure the output pic is consistent with the input images. Signed-off-by: kyrie.wu --- drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.c | 50 +++++++++++++++++++++-- 1 file changed, 46 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.c index 9138ecb..fad5bf1c 100644 --- a/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mtk-jpeg/mtk_jpeg_dec_hw.c @@ -443,6 +443,49 @@ void mtk_jpeg_dec_set_config(void __iomem *base, mtk_jpeg_dec_set_pause_mcu_idx(base, config->total_mcu); } +void mtk_jpegdec_put_buf(struct mtk_jpegdec_comp_dev *jpeg) +{ + struct mtk_jpeg_src_buf *dst_done_buf, *tmp_dst_done_buf; + struct vb2_v4l2_buffer *dst_buffer; + struct list_head *temp_entry; + struct list_head *pos = NULL; + struct mtk_jpeg_ctx *ctx; + unsigned long flags; + + ctx = jpeg->hw_param.curr_ctx; + if (!ctx) { + dev_err(jpeg->dev, "comp_jpeg ctx fail !!!\n"); + return; + } + + dst_buffer = jpeg->hw_param.dst_buffer; + if (!dst_buffer) { + dev_err(jpeg->dev, "comp_jpeg dst_buffer fail !!!\n"); + return; + } + + dst_done_buf = container_of(dst_buffer, struct mtk_jpeg_src_buf, b); + + spin_lock_irqsave(&ctx->done_queue_lock, flags); + list_add_tail(&dst_done_buf->list, &ctx->dst_done_queue); + while (!list_empty(&ctx->dst_done_queue) && + (pos != &ctx->dst_done_queue)) { + list_for_each_prev_safe(pos, temp_entry, + (&ctx->dst_done_queue)) { + tmp_dst_done_buf = list_entry(pos, + struct mtk_jpeg_src_buf, list); + if (tmp_dst_done_buf->frame_num == + ctx->last_done_frame_num) { + list_del(&tmp_dst_done_buf->list); + v4l2_m2m_buf_done(&tmp_dst_done_buf->b, + VB2_BUF_STATE_DONE); + ctx->last_done_frame_num++; + } + } + } + spin_unlock_irqrestore(&ctx->done_queue_lock, flags); +} + static void mtk_jpegdec_timeout_work(struct work_struct *work) { enum vb2_buffer_state buf_state = VB2_BUF_STATE_ERROR; @@ -450,10 +493,9 @@ static void mtk_jpegdec_timeout_work(struct work_struct *work) container_of(work, struct mtk_jpegdec_comp_dev, job_timeout_work.work); struct mtk_jpeg_dev *master_jpeg = cjpeg->master_dev; - struct vb2_v4l2_buffer *src_buf, *dst_buf; + struct vb2_v4l2_buffer *src_buf; src_buf = cjpeg->hw_param.src_buffer; - dst_buf = cjpeg->hw_param.dst_buffer; mtk_jpeg_dec_reset(cjpeg->reg_base); clk_disable_unprepare(cjpeg->pm.dec_clk.clk_info->jpegdec_clk); @@ -462,7 +504,7 @@ static void mtk_jpegdec_timeout_work(struct work_struct *work) atomic_inc(&cjpeg->hw_rdy); wake_up(&master_jpeg->dec_hw_wq); v4l2_m2m_buf_done(src_buf, buf_state); - v4l2_m2m_buf_done(dst_buf, buf_state); + mtk_jpegdec_put_buf(cjpeg); } int mtk_jpegdec_init_pm(struct mtk_jpegdec_comp_dev *mtkdev) @@ -559,7 +601,7 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv) dec_end: v4l2_m2m_buf_done(src_buf, buf_state); - v4l2_m2m_buf_done(dst_buf, buf_state); + mtk_jpegdec_put_buf(jpeg); v4l2_m2m_job_finish(master_jpeg->m2m_dev, ctx->fh.m2m_ctx); clk_disable_unprepare(jpeg->pm.dec_clk.clk_info->jpegdec_clk); pm_runtime_put(ctx->jpeg->dev);