| Message ID | 1645760667-10510-9-git-send-email-hongxing.zhu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI: imx6: refine codes and add compliance tests mode support | expand |
On Fri, Feb 25, 2022 at 11:44:27AM +0800, Richard Zhu wrote: > Refer to the Chapter 3.2 System Board Signal Quality of PCI Express > Architecture PHY Test Specification Revision 2.0. > > Signal quality tests (for example: jitter, differential eye opening and > so on) can be executed with devices in the polling.compliance state. > > To let the device support polling.compliance state, the clocks and powers > shouldn't be turned off when the probe of device driver fails. > > Based on CLB (Compliance Load Board) Test Fixture and so on test > equipments, the PHY link would be down during the compliance tests. > Refer to this scenario, add the i.MX PCIe compliance tests mode enable > support, and keep the clocks and powers on, and finish the driver probe > without error return. How is this specific to i.MX? If there's a need for compliance test mode, then shouldn't it be common? However, while your usecase is compliance testing, there doesn't seem to be any need for the kernel to know what the usecase is. In the same series you've argued both ways. You need the driver to probe successfully with no link and you need it to shutdown on no link. > > Use the "pci_imx6.compliance=1" in kernel command line to enable the > compliance tests mode. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > --- > drivers/pci/controller/dwc/pci-imx6.c | 47 ++++++++++++++++++--------- > 1 file changed, 31 insertions(+), 16 deletions(-)
> -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 2022年4月2日 4:27 > To: Hongxing Zhu <hongxing.zhu@nxp.com> > Cc: l.stach@pengutronix.de; bhelgaas@google.com; broonie@kernel.org; > lorenzo.pieralisi@arm.com; jingoohan1@gmail.com; festevam@gmail.com; > francesco.dolcini@toradex.com; linux-pci@vger.kernel.org; > linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com> > Subject: Re: [PATCH v8 8/8] PCI: imx6: Add compliance tests mode support > > On Fri, Feb 25, 2022 at 11:44:27AM +0800, Richard Zhu wrote: > > Refer to the Chapter 3.2 System Board Signal Quality of PCI Express > > Architecture PHY Test Specification Revision 2.0. > > > > Signal quality tests (for example: jitter, differential eye opening > > and so on) can be executed with devices in the polling.compliance state. > > > > To let the device support polling.compliance state, the clocks and > > powers shouldn't be turned off when the probe of device driver fails. > > > > Based on CLB (Compliance Load Board) Test Fixture and so on test > > equipments, the PHY link would be down during the compliance tests. > > Refer to this scenario, add the i.MX PCIe compliance tests mode enable > > support, and keep the clocks and powers on, and finish the driver > > probe without error return. > > How is this specific to i.MX? If there's a need for compliance test mode, then > shouldn't it be common? However, while your usecase is compliance testing, > there doesn't seem to be any need for the kernel to know what the usecase is. > > In the same series you've argued both ways. You need the driver to probe > successfully with no link and you need it to shutdown on no link. > Hi Rob: Thank a lot for your review comments. Based on this series, to save power consumption, i.MX PCIe would turn off the power/clocks when probe failed. Thus, it's specific to i.MX to add one more option to keep power/clocks on when compliance tests mode is required. The compliance test mode can be enabled dynamically through the module_para setting. Best Regards Richard Zhu > > > > Use the "pci_imx6.compliance=1" in kernel command line to enable the > > compliance tests mode. > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > --- > > drivers/pci/controller/dwc/pci-imx6.c | 47 > > ++++++++++++++++++--------- > > 1 file changed, 31 insertions(+), 16 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index f8b15f0bc9ce..b976a4802db0 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -146,6 +146,10 @@ struct imx6_pcie { #define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5) #define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3) +static bool imx6_pcie_cmp_mode; +module_param_named(compliance, imx6_pcie_cmp_mode, bool, 0644); +MODULE_PARM_DESC(compliance, "i.MX PCIe compliance test mode (1=compliance test mode enabled)"); + static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val) { struct dw_pcie *pci = imx6_pcie->pci; @@ -841,10 +845,12 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) * started in Gen2 mode, there is a possibility the devices on the * bus will not be detected at all. This happens with PCIe switches. */ - tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); - tmp &= ~PCI_EXP_LNKCAP_SLS; - tmp |= PCI_EXP_LNKCAP_SLS_2_5GB; - dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp); + if (!imx6_pcie_cmp_mode) { + tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); + tmp &= ~PCI_EXP_LNKCAP_SLS; + tmp |= PCI_EXP_LNKCAP_SLS_2_5GB; + dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp); + } /* Start LTSSM. */ imx6_pcie_ltssm_enable(dev); @@ -931,18 +937,20 @@ static void imx6_pcie_host_exit(struct pcie_port *pp) struct device *dev = pci->dev; struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci); - imx6_pcie_reset_phy(imx6_pcie); - imx6_pcie_clk_disable(imx6_pcie); - switch (imx6_pcie->drvdata->variant) { - case IMX8MM: - if (phy_power_off(imx6_pcie->phy)) - dev_err(dev, "unable to power off phy\n"); - break; - default: - break; + if (!imx6_pcie_cmp_mode) { + imx6_pcie_reset_phy(imx6_pcie); + imx6_pcie_clk_disable(imx6_pcie); + switch (imx6_pcie->drvdata->variant) { + case IMX8MM: + if (phy_power_off(imx6_pcie->phy)) + dev_err(dev, "unable to power off phy\n"); + break; + default: + break; + } + if (imx6_pcie->vpcie) + regulator_disable(imx6_pcie->vpcie); } - if (imx6_pcie->vpcie) - regulator_disable(imx6_pcie->vpcie); } static const struct dw_pcie_host_ops imx6_pcie_host_ops = { @@ -1260,8 +1268,15 @@ static int imx6_pcie_probe(struct platform_device *pdev) return ret; ret = dw_pcie_host_init(&pci->pp); - if (ret < 0) + if (ret < 0) { + if (imx6_pcie_cmp_mode) { + dev_info(dev, "driver loaded with compliance test mode enabled\n"); + ret = 0; + } else { + dev_err(dev, "unable to add PCIe port\n"); + } return ret; + } if (pci_msi_enabled()) { u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
Refer to the Chapter 3.2 System Board Signal Quality of PCI Express Architecture PHY Test Specification Revision 2.0. Signal quality tests (for example: jitter, differential eye opening and so on) can be executed with devices in the polling.compliance state. To let the device support polling.compliance state, the clocks and powers shouldn't be turned off when the probe of device driver fails. Based on CLB (Compliance Load Board) Test Fixture and so on test equipments, the PHY link would be down during the compliance tests. Refer to this scenario, add the i.MX PCIe compliance tests mode enable support, and keep the clocks and powers on, and finish the driver probe without error return. Use the "pci_imx6.compliance=1" in kernel command line to enable the compliance tests mode. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> --- drivers/pci/controller/dwc/pci-imx6.c | 47 ++++++++++++++++++--------- 1 file changed, 31 insertions(+), 16 deletions(-)