diff mbox series

arm64: dts: imx8m: correct usb power domain

Message ID 1651218184-22066-1-git-send-email-jun.li@nxp.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8m: correct usb power domain | expand

Commit Message

Jun Li April 29, 2022, 7:43 a.m. UTC
pgc_otg1/2 is for each usb phy and pgc_hsiomix is shared
by 2 usb controllers, so assign those power domains to
correct controller and phy node, decouple the pgc_otg1/2
from pgc_hsiomix since there is no hardware dependency.

Suggested-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++----
 arch/arm64/boot/dts/freescale/imx8mn.dtsi | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Frieder Schrempf April 29, 2022, 9:03 a.m. UTC | #1
Am 29.04.22 um 09:43 schrieb Li Jun:
> pgc_otg1/2 is for each usb phy and pgc_hsiomix is shared
> by 2 usb controllers, so assign those power domains to
> correct controller and phy node, decouple the pgc_otg1/2
> from pgc_hsiomix since there is no hardware dependency.
> 
> Suggested-by: Jacky Bai <ping.bai@nxp.com>
> Signed-off-by: Li Jun <jun.li@nxp.com>

Thanks for the patch!

In my previous test I probably made some mistake. The second USB
controller was kept enabled by the onboard hub. When I disable the
second port and test the patch with the first port only, resuming from
autosuspend still doesn't work, even when I keep the HSIOMIX as parent
for OTG1/2. So there's probably still something missing...

> ---
>  arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8 ++++----
>  arch/arm64/boot/dts/freescale/imx8mn.dtsi | 4 ++--
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 1ee05677c2dd..3ff71ca122e4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -275,6 +275,7 @@ usbphynop1: usbphynop1 {
>  		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
>  		assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
>  		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
> +		power-domains = <&pgc_otg1>;
>  		clock-names = "main_clk";
>  	};
>  
> @@ -284,6 +285,7 @@ usbphynop2: usbphynop2 {
>  		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
>  		assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
>  		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
> +		power-domains = <&pgc_otg2>;
>  		clock-names = "main_clk";
>  	};
>  
> @@ -669,13 +671,11 @@ pgc_pcie: power-domain@1 {
>  					pgc_otg1: power-domain@2 {
>  						#power-domain-cells = <0>;
>  						reg = <IMX8MM_POWER_DOMAIN_OTG1>;
> -						power-domains = <&pgc_hsiomix>;
>  					};
>  
>  					pgc_otg2: power-domain@3 {
>  						#power-domain-cells = <0>;
>  						reg = <IMX8MM_POWER_DOMAIN_OTG2>;
> -						power-domains = <&pgc_hsiomix>;
>  					};
>  
>  					pgc_gpumix: power-domain@4 {
> @@ -1180,7 +1180,7 @@ usbotg1: usb@32e40000 {
>  				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
>  				phys = <&usbphynop1>;
>  				fsl,usbmisc = <&usbmisc1 0>;
> -				power-domains = <&pgc_otg1>;
> +				power-domains = <&pgc_hsiomix>;
>  				status = "disabled";
>  			};
>  
> @@ -1200,7 +1200,7 @@ usbotg2: usb@32e50000 {
>  				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
>  				phys = <&usbphynop2>;
>  				fsl,usbmisc = <&usbmisc2 0>;
> -				power-domains = <&pgc_otg2>;
> +				power-domains = <&pgc_hsiomix>;
>  				status = "disabled";
>  			};
>  
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 8def5d679e7e..5482180236ae 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -662,7 +662,6 @@ pgc_hsiomix: power-domain@0 {
>  					pgc_otg1: power-domain@1 {
>  						#power-domain-cells = <0>;
>  						reg = <IMX8MN_POWER_DOMAIN_OTG1>;
> -						power-domains = <&pgc_hsiomix>;
>  					};
>  
>  					pgc_gpumix: power-domain@2 {
> @@ -1076,7 +1075,7 @@ usbotg1: usb@32e40000 {
>  				assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
>  				phys = <&usbphynop1>;
>  				fsl,usbmisc = <&usbmisc1 0>;
> -				power-domains = <&pgc_otg1>;
> +				power-domains = <&pgc_hsiomix>;
>  				status = "disabled";
>  			};
>  
> @@ -1174,6 +1173,7 @@ usbphynop1: usbphynop1 {
>  		clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
>  		assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
>  		assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
> +		power-domains = <&pgc_otg1>;
>  		clock-names = "main_clk";
>  	};
>  };
Jun Li April 29, 2022, 10:09 a.m. UTC | #2
> -----Original Message-----
> From: Frieder Schrempf <frieder.schrempf@kontron.de>
> Sent: Friday, April 29, 2022 5:04 PM
> To: Jun Li <jun.li@nxp.com>; shawnguo@kernel.org
> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>; l.stach@pengutronix.de;
> aford173@gmail.com; tharvey@gateworks.com; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; Jacky Bai <ping.bai@nxp.com>
> Subject: Re: [PATCH] arm64: dts: imx8m: correct usb power domain
> 
> Am 29.04.22 um 09:43 schrieb Li Jun:
> > pgc_otg1/2 is for each usb phy and pgc_hsiomix is shared by 2 usb
> > controllers, so assign those power domains to correct controller and
> > phy node, decouple the pgc_otg1/2 from pgc_hsiomix since there is no
> > hardware dependency.
> >
> > Suggested-by: Jacky Bai <ping.bai@nxp.com>
> > Signed-off-by: Li Jun <jun.li@nxp.com>
> 
> Thanks for the patch!
> 
> In my previous test I probably made some mistake. The second USB controller
> was kept enabled by the onboard hub. When I disable the second port and test
> the patch with the first port only, resuming from autosuspend still doesn't
> work, even when I keep the HSIOMIX as parent for OTG1/2. So there's probably
> still something missing...

My test was done with both second USB port and PCIE disabled, so
while autosuspend of first port, the pgc_hsiomix is off, it works
fine on my HW:

root@imx8mqevk:~# [   81.021437] usb 1-1: USB disconnect, device number 3
 
root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/usb-otg1/current_state
on
root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state 
off-0
root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state                                                                                                                      
off-0
root@imx8mqevk:~# [  182.196450] usb 1-1: new high-speed USB device number 4 using ci_hdrc
[  182.356130] usb-storage 1-1:1.0: USB Mass Storage device detected
[  182.357632] scsi host0: usb-storage 1-1:1.0
[  183.367923] scsi 0:0:0:0: Direct-Access     SanDisk  Ultra            1.00 PQ: 0 ANSI: 6
[  183.370559] sd 0:0:0:0: [sda] 60062500 512-byte logical blocks: (30.8 GB/28.6 GiB)
[  183.372332] sd 0:0:0:0: [sda] Write Protect is off
[  183.373061] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
[  183.384709] sd 0:0:0:0: [sda] Attached SCSI removable disk
[  184.207552] EXT4-fs (sda): mounted filesystem with ordered data mode. Quota mode: none.

root@imx8mqevk:~# ls /sys/bus/platform/devices/*usb* -d
/sys/bus/platform/devices/32e40000.usb
/sys/bus/platform/devices/32e40200.usbmisc
/sys/bus/platform/devices/usbphynop1

So basically you are saying your first port cannot work even both pgc_otg1 and
pgc_hsiomix are on if you disable 2nd port? 

Li Jun
Frieder Schrempf April 29, 2022, 3:24 p.m. UTC | #3
Am 29.04.22 um 12:09 schrieb Jun Li:
>> -----Original Message-----
>> From: Frieder Schrempf <frieder.schrempf@kontron.de>
>> Sent: Friday, April 29, 2022 5:04 PM
>> To: Jun Li <jun.li@nxp.com>; shawnguo@kernel.org
>> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
>> dl-linux-imx <linux-imx@nxp.com>; l.stach@pengutronix.de;
>> aford173@gmail.com; tharvey@gateworks.com; devicetree@vger.kernel.org;
>> linux-arm-kernel@lists.infradead.org; Jacky Bai <ping.bai@nxp.com>
>> Subject: Re: [PATCH] arm64: dts: imx8m: correct usb power domain
>>
>> Am 29.04.22 um 09:43 schrieb Li Jun:
>>> pgc_otg1/2 is for each usb phy and pgc_hsiomix is shared by 2 usb
>>> controllers, so assign those power domains to correct controller and
>>> phy node, decouple the pgc_otg1/2 from pgc_hsiomix since there is no
>>> hardware dependency.
>>>
>>> Suggested-by: Jacky Bai <ping.bai@nxp.com>
>>> Signed-off-by: Li Jun <jun.li@nxp.com>
>>
>> Thanks for the patch!
>>
>> In my previous test I probably made some mistake. The second USB controller
>> was kept enabled by the onboard hub. When I disable the second port and test
>> the patch with the first port only, resuming from autosuspend still doesn't
>> work, even when I keep the HSIOMIX as parent for OTG1/2. So there's probably
>> still something missing...
> 
> My test was done with both second USB port and PCIE disabled, so
> while autosuspend of first port, the pgc_hsiomix is off, it works
> fine on my HW:
> 
> root@imx8mqevk:~# [   81.021437] usb 1-1: USB disconnect, device number 3

Are you testing on i.MX8MM/N EVK? Your CLI prompt says imx8mqevk, which
seems a bit misleading...

On which kernel version are you testing? I'm on 5.18-rc4.

>  
> root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/usb-otg1/current_state
> on
> root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state 
> off-0
> root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state                                                                                                                      
> off-0
> root@imx8mqevk:~# [  182.196450] usb 1-1: new high-speed USB device number 4 using ci_hdrc
> [  182.356130] usb-storage 1-1:1.0: USB Mass Storage device detected
> [  182.357632] scsi host0: usb-storage 1-1:1.0
> [  183.367923] scsi 0:0:0:0: Direct-Access     SanDisk  Ultra            1.00 PQ: 0 ANSI: 6
> [  183.370559] sd 0:0:0:0: [sda] 60062500 512-byte logical blocks: (30.8 GB/28.6 GiB)
> [  183.372332] sd 0:0:0:0: [sda] Write Protect is off
> [  183.373061] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
> [  183.384709] sd 0:0:0:0: [sda] Attached SCSI removable disk
> [  184.207552] EXT4-fs (sda): mounted filesystem with ordered data mode. Quota mode: none.
> 
> root@imx8mqevk:~# ls /sys/bus/platform/devices/*usb* -d
> /sys/bus/platform/devices/32e40000.usb
> /sys/bus/platform/devices/32e40200.usbmisc
> /sys/bus/platform/devices/usbphynop1

The PCIe nodes, usbotg2, usbphynop2 and usbmisc2 are disabled and
devices on the autosuspended first port aren't detected:

root@kontron-mx8mm:~# cat /sys/kernel/debug/pm_genpd/usb-otg1/current_state
on
root@kontron-mx8mm:~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state
off-0
root@kontron-mx8mm:~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state
off-0

root@kontron-mx8mm:~# ls /sys/bus/platform/devices/*usb* -d
/sys/bus/platform/devices/32e40000.usb
/sys/bus/platform/devices/32e40200.usbmisc
/sys/bus/platform/devices/usbphynop1

> 
> So basically you are saying your first port cannot work even both pgc_otg1 and
> pgc_hsiomix are on if you disable 2nd port? 

Exactly. I really don't understand it, but as soon as I disable the
second port the detection of a device on the suspended first port stops
working. When I force the port on, the device is detected:

root@kontron-mx8mm:~# echo on > /sys/bus/usb/devices/usb1/power/control
root@kontron-mx8mm:~# [  194.523296] usb 1-1: new full-speed USB device
number 2 using ci_hdrc
Jun Li April 29, 2022, 3:58 p.m. UTC | #4
> -----Original Message-----
> From: Frieder Schrempf <frieder.schrempf@kontron.de>
> Sent: Friday, April 29, 2022 11:25 PM
> To: Jun Li <jun.li@nxp.com>; shawnguo@kernel.org
> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>; l.stach@pengutronix.de;
> aford173@gmail.com; tharvey@gateworks.com; devicetree@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; Jacky Bai <ping.bai@nxp.com>
> Subject: Re: [PATCH] arm64: dts: imx8m: correct usb power domain
> 
> Am 29.04.22 um 12:09 schrieb Jun Li:
> >> -----Original Message-----
> >> From: Frieder Schrempf <frieder.schrempf@kontron.de>
> >> Sent: Friday, April 29, 2022 5:04 PM
> >> To: Jun Li <jun.li@nxp.com>; shawnguo@kernel.org
> >> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> >> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> >> dl-linux-imx <linux-imx@nxp.com>; l.stach@pengutronix.de;
> >> aford173@gmail.com; tharvey@gateworks.com;
> >> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> >> Jacky Bai <ping.bai@nxp.com>
> >> Subject: Re: [PATCH] arm64: dts: imx8m: correct usb power domain
> >>
> >> Am 29.04.22 um 09:43 schrieb Li Jun:
> >>> pgc_otg1/2 is for each usb phy and pgc_hsiomix is shared by 2 usb
> >>> controllers, so assign those power domains to correct controller and
> >>> phy node, decouple the pgc_otg1/2 from pgc_hsiomix since there is no
> >>> hardware dependency.
> >>>
> >>> Suggested-by: Jacky Bai <ping.bai@nxp.com>
> >>> Signed-off-by: Li Jun <jun.li@nxp.com>
> >>
> >> Thanks for the patch!
> >>
> >> In my previous test I probably made some mistake. The second USB
> >> controller was kept enabled by the onboard hub. When I disable the
> >> second port and test the patch with the first port only, resuming
> >> from autosuspend still doesn't work, even when I keep the HSIOMIX as
> >> parent for OTG1/2. So there's probably still something missing...
> >
> > My test was done with both second USB port and PCIE disabled, so while
> > autosuspend of first port, the pgc_hsiomix is off, it works fine on my
> > HW:
> >
> > root@imx8mqevk:~# [   81.021437] usb 1-1: USB disconnect, device number
> 3
> 
> Are you testing on i.MX8MM/N EVK? Your CLI prompt says imx8mqevk, which seems
> a bit misleading...

I was just using a rootfs for iMX8mq, which doesn't matter.

> 
> On which kernel version are you testing? I'm on 5.18-rc4.

Add linux-next specific files for 20220428

> 
> >
> > root@imx8mqevk:~# cat
> > /sys/kernel/debug/pm_genpd/usb-otg1/current_state
> > on
> > root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state
> > off-0
> > root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state
> > off-0
> > root@imx8mqevk:~# [  182.196450] usb 1-1: new high-speed USB device
> > number 4 using ci_hdrc [  182.356130] usb-storage 1-1:1.0: USB Mass
> > Storage device detected [  182.357632] scsi host0: usb-storage 1-1:1.0
> > [  183.367923] scsi 0:0:0:0: Direct-Access     SanDisk  Ultra
> 1.00 PQ: 0 ANSI: 6
> > [  183.370559] sd 0:0:0:0: [sda] 60062500 512-byte logical blocks:
> > (30.8 GB/28.6 GiB) [  183.372332] sd 0:0:0:0: [sda] Write Protect is
> > off [  183.373061] sd 0:0:0:0: [sda] Write cache: disabled, read
> > cache: enabled, doesn't support DPO or FUA [  183.384709] sd 0:0:0:0:
> > [sda] Attached SCSI removable disk [  184.207552] EXT4-fs (sda): mounted
> filesystem with ordered data mode. Quota mode: none.
> >
> > root@imx8mqevk:~# ls /sys/bus/platform/devices/*usb* -d
> > /sys/bus/platform/devices/32e40000.usb
> > /sys/bus/platform/devices/32e40200.usbmisc
> > /sys/bus/platform/devices/usbphynop1
> 
> The PCIe nodes, usbotg2, usbphynop2 and usbmisc2 are disabled and devices
> on the autosuspended first port aren't detected:
> 
> root@kontron-mx8mm:~# cat
> /sys/kernel/debug/pm_genpd/usb-otg1/current_state
> on
> root@kontron-mx8mm:~# cat
> /sys/kernel/debug/pm_genpd/usb-otg2/current_state
> off-0
> root@kontron-mx8mm:~# cat
> /sys/kernel/debug/pm_genpd/hsiomix/current_state
> off-0
> 
> root@kontron-mx8mm:~# ls /sys/bus/platform/devices/*usb* -d
> /sys/bus/platform/devices/32e40000.usb
> /sys/bus/platform/devices/32e40200.usbmisc
> /sys/bus/platform/devices/usbphynop1
> 
> >
> > So basically you are saying your first port cannot work even both
> > pgc_otg1 and pgc_hsiomix are on if you disable 2nd port?
> 
> Exactly. I really don't understand it, but as soon as I disable the second
> port the detection of a device on the suspended first port stops working.
> When I force the port on, the device is detected:

Here your intention is force *which* port? 1st port(usbotg1) or the 2nd
port(usbotg2)?

> 
> root@kontron-mx8mm:~# echo on > /sys/bus/usb/devices/usb1/power/control

Is this usb root hub for your second usb port? If it's for your 1st port,
this just can indicate the 1st port can detect device if disable the whole
runtime suspend.

Can you show the full test log with both usb ports(usbotg1 and usbotg2)
Enabled? E.g, like if you let both usb ports runtime suspended, then
Either port will not work, then if you force the 2nd port on, then your
1st port will start work?

Li Jun

> root@kontron-mx8mm:~# [  194.523296] usb 1-1: new full-speed USB device
> number 2 using ci_hdrc
Frieder Schrempf May 2, 2022, 9:24 a.m. UTC | #5
Am 29.04.22 um 17:58 schrieb Jun Li:
> 
> 
>> -----Original Message-----
>> From: Frieder Schrempf <frieder.schrempf@kontron.de>
>> Sent: Friday, April 29, 2022 11:25 PM
>> To: Jun Li <jun.li@nxp.com>; shawnguo@kernel.org
>> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
>> dl-linux-imx <linux-imx@nxp.com>; l.stach@pengutronix.de;
>> aford173@gmail.com; tharvey@gateworks.com; devicetree@vger.kernel.org;
>> linux-arm-kernel@lists.infradead.org; Jacky Bai <ping.bai@nxp.com>
>> Subject: Re: [PATCH] arm64: dts: imx8m: correct usb power domain
>>
>> Am 29.04.22 um 12:09 schrieb Jun Li:
>>>> -----Original Message-----
>>>> From: Frieder Schrempf <frieder.schrempf@kontron.de>
>>>> Sent: Friday, April 29, 2022 5:04 PM
>>>> To: Jun Li <jun.li@nxp.com>; shawnguo@kernel.org
>>>> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
>>>> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
>>>> dl-linux-imx <linux-imx@nxp.com>; l.stach@pengutronix.de;
>>>> aford173@gmail.com; tharvey@gateworks.com;
>>>> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
>>>> Jacky Bai <ping.bai@nxp.com>
>>>> Subject: Re: [PATCH] arm64: dts: imx8m: correct usb power domain
>>>>
>>>> Am 29.04.22 um 09:43 schrieb Li Jun:
>>>>> pgc_otg1/2 is for each usb phy and pgc_hsiomix is shared by 2 usb
>>>>> controllers, so assign those power domains to correct controller and
>>>>> phy node, decouple the pgc_otg1/2 from pgc_hsiomix since there is no
>>>>> hardware dependency.
>>>>>
>>>>> Suggested-by: Jacky Bai <ping.bai@nxp.com>
>>>>> Signed-off-by: Li Jun <jun.li@nxp.com>
>>>>
>>>> Thanks for the patch!
>>>>
>>>> In my previous test I probably made some mistake. The second USB
>>>> controller was kept enabled by the onboard hub. When I disable the
>>>> second port and test the patch with the first port only, resuming
>>>> from autosuspend still doesn't work, even when I keep the HSIOMIX as
>>>> parent for OTG1/2. So there's probably still something missing...
>>>
>>> My test was done with both second USB port and PCIE disabled, so while
>>> autosuspend of first port, the pgc_hsiomix is off, it works fine on my
>>> HW:
>>>
>>> root@imx8mqevk:~# [   81.021437] usb 1-1: USB disconnect, device number
>> 3
>>
>> Are you testing on i.MX8MM/N EVK? Your CLI prompt says imx8mqevk, which seems
>> a bit misleading...
> 
> I was just using a rootfs for iMX8mq, which doesn't matter.

Ok, I just wanted to make sure there is no confusion.

>>
>> On which kernel version are you testing? I'm on 5.18-rc4.
> 
> Add linux-next specific files for 20220428
> 
>>
>>>
>>> root@imx8mqevk:~# cat
>>> /sys/kernel/debug/pm_genpd/usb-otg1/current_state
>>> on
>>> root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state
>>> off-0
>>> root@imx8mqevk:~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state
>>> off-0
>>> root@imx8mqevk:~# [  182.196450] usb 1-1: new high-speed USB device
>>> number 4 using ci_hdrc [  182.356130] usb-storage 1-1:1.0: USB Mass
>>> Storage device detected [  182.357632] scsi host0: usb-storage 1-1:1.0
>>> [  183.367923] scsi 0:0:0:0: Direct-Access     SanDisk  Ultra
>> 1.00 PQ: 0 ANSI: 6
>>> [  183.370559] sd 0:0:0:0: [sda] 60062500 512-byte logical blocks:
>>> (30.8 GB/28.6 GiB) [  183.372332] sd 0:0:0:0: [sda] Write Protect is
>>> off [  183.373061] sd 0:0:0:0: [sda] Write cache: disabled, read
>>> cache: enabled, doesn't support DPO or FUA [  183.384709] sd 0:0:0:0:
>>> [sda] Attached SCSI removable disk [  184.207552] EXT4-fs (sda): mounted
>> filesystem with ordered data mode. Quota mode: none.
>>>
>>> root@imx8mqevk:~# ls /sys/bus/platform/devices/*usb* -d
>>> /sys/bus/platform/devices/32e40000.usb
>>> /sys/bus/platform/devices/32e40200.usbmisc
>>> /sys/bus/platform/devices/usbphynop1
>>
>> The PCIe nodes, usbotg2, usbphynop2 and usbmisc2 are disabled and devices
>> on the autosuspended first port aren't detected:
>>
>> root@kontron-mx8mm:~# cat
>> /sys/kernel/debug/pm_genpd/usb-otg1/current_state
>> on
>> root@kontron-mx8mm:~# cat
>> /sys/kernel/debug/pm_genpd/usb-otg2/current_state
>> off-0
>> root@kontron-mx8mm:~# cat
>> /sys/kernel/debug/pm_genpd/hsiomix/current_state
>> off-0
>>
>> root@kontron-mx8mm:~# ls /sys/bus/platform/devices/*usb* -d
>> /sys/bus/platform/devices/32e40000.usb
>> /sys/bus/platform/devices/32e40200.usbmisc
>> /sys/bus/platform/devices/usbphynop1
>>
>>>
>>> So basically you are saying your first port cannot work even both
>>> pgc_otg1 and pgc_hsiomix are on if you disable 2nd port?
>>
>> Exactly. I really don't understand it, but as soon as I disable the second
>> port the detection of a device on the suspended first port stops working.
>> When I force the port on, the device is detected:
> 
> Here your intention is force *which* port? 1st port(usbotg1) or the 2nd
> port(usbotg2)?

I force on the first port (usbotg1), just to show that the issue is
related to the port being suspended and it works in general. The second
port (usbotg2) was completely disabled via devicetree in this scenario.

>>
>> root@kontron-mx8mm:~# echo on > /sys/bus/usb/devices/usb1/power/control
> 
> Is this usb root hub for your second usb port? If it's for your 1st port,
> this just can indicate the 1st port can detect device if disable the whole
> runtime suspend.

This is for the first port. Right, this is just to show that the port
works with autosuspend disabled.

> 
> Can you show the full test log with both usb ports(usbotg1 and usbotg2)
> Enabled? E.g, like if you let both usb ports runtime suspended, then
> Either port will not work, then if you force the 2nd port on, then your
> 1st port will start work?

So far, I tested on a board that has a LAN9514 on the second port. Now I
did some more tests on a board without any hardwired USB devices. I only
have physical access to usbotg1, though.

~# echo auto > /sys/bus/usb/devices/usb1/power/control
~# echo auto > /sys/bus/usb/devices/usb2/power/control
[connect device to usbotg1, device is not detected]
~# cat /sys/kernel/debug/pm_genpd/usb-otg1/current_state
on
~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state
on
~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state
off-0
~# echo on > /sys/bus/usb/devices/usb2/power/control
[device on usbotg1 gets detected after autosuspend on usbotg2 has been
disabled]
~# cat /sys/kernel/debug/pm_genpd/usb-otg1/current_state
on
~# cat /sys/kernel/debug/pm_genpd/usb-otg2/current_state
on
~# cat /sys/kernel/debug/pm_genpd/hsiomix/current_state
on

This looks like HSIOMIX needs to be enabled for the detection to work.
But when I add the HSIOMIX domain as parent of the OTG1/2 domains as it
was before this patch, the detection still does not work. Behavior is
the same as reported above. So I guess there must be some common clock,
reset, etc. that needs to be kept on while suspending!?
Probably your patch is correct, but there is some other overlapping issue!?
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 1ee05677c2dd..3ff71ca122e4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -275,6 +275,7 @@  usbphynop1: usbphynop1 {
 		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
 		assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
 		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
+		power-domains = <&pgc_otg1>;
 		clock-names = "main_clk";
 	};
 
@@ -284,6 +285,7 @@  usbphynop2: usbphynop2 {
 		clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
 		assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
 		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
+		power-domains = <&pgc_otg2>;
 		clock-names = "main_clk";
 	};
 
@@ -669,13 +671,11 @@  pgc_pcie: power-domain@1 {
 					pgc_otg1: power-domain@2 {
 						#power-domain-cells = <0>;
 						reg = <IMX8MM_POWER_DOMAIN_OTG1>;
-						power-domains = <&pgc_hsiomix>;
 					};
 
 					pgc_otg2: power-domain@3 {
 						#power-domain-cells = <0>;
 						reg = <IMX8MM_POWER_DOMAIN_OTG2>;
-						power-domains = <&pgc_hsiomix>;
 					};
 
 					pgc_gpumix: power-domain@4 {
@@ -1180,7 +1180,7 @@  usbotg1: usb@32e40000 {
 				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
 				phys = <&usbphynop1>;
 				fsl,usbmisc = <&usbmisc1 0>;
-				power-domains = <&pgc_otg1>;
+				power-domains = <&pgc_hsiomix>;
 				status = "disabled";
 			};
 
@@ -1200,7 +1200,7 @@  usbotg2: usb@32e50000 {
 				assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
 				phys = <&usbphynop2>;
 				fsl,usbmisc = <&usbmisc2 0>;
-				power-domains = <&pgc_otg2>;
+				power-domains = <&pgc_hsiomix>;
 				status = "disabled";
 			};
 
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 8def5d679e7e..5482180236ae 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -662,7 +662,6 @@  pgc_hsiomix: power-domain@0 {
 					pgc_otg1: power-domain@1 {
 						#power-domain-cells = <0>;
 						reg = <IMX8MN_POWER_DOMAIN_OTG1>;
-						power-domains = <&pgc_hsiomix>;
 					};
 
 					pgc_gpumix: power-domain@2 {
@@ -1076,7 +1075,7 @@  usbotg1: usb@32e40000 {
 				assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
 				phys = <&usbphynop1>;
 				fsl,usbmisc = <&usbmisc1 0>;
-				power-domains = <&pgc_otg1>;
+				power-domains = <&pgc_hsiomix>;
 				status = "disabled";
 			};
 
@@ -1174,6 +1173,7 @@  usbphynop1: usbphynop1 {
 		clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
 		assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
 		assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
+		power-domains = <&pgc_otg1>;
 		clock-names = "main_clk";
 	};
 };