| Message ID | 1653012007-11854-4-git-send-email-xinlei.lee@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Cooperate with DSI RX devices to modify dsi funcs and delay mipi high to cooperate with panel sequence | expand |
On Fri, 2022-05-20 at 10:00 +0800, xinlei.lee@mediatek.com wrote: > From: Jitao Shi <jitao.shi@mediatek.com> > > To comply with the panel sequence, hold the mipi signal to LP00 > before the dcs cmds transmission, > and pull the mipi signal high from LP00 to LP11 until the start of > the dcs cmds transmission. > The normal panel timing is : > (1) pp1800 DC pull up > (2) avdd & avee AC pull high > (3) lcm_reset pull high -> pull low -> pull high > (4) Pull MIPI signal high (LP11) -> initial code -> send video > data(HS mode) > The power-off sequence is reversed. > If dsi is not in cmd mode, then dsi will pull the mipi signal high in > the mtk_output_dsi_enable function. > The delay in lane_ready func is the reaction time of dsi_rx after > pulling up the mipi signal. > > Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the drm_panel_bridge > API") > > Cc: <stable@vger.kernel.org> # 5.10.x: b255d51e3967: sched: Modify > dsi funcs to atomic operations > Cc: <stable@vger.kernel.org> # 5.10.x: 72c69c977502: sched: Separate > poweron/poweroff from enable/disable and define new funcs > Cc: <stable@vger.kernel.org> # 5.10.x > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Hi, Xinlei: On Fri, 2022-05-20 at 10:00 +0800, xinlei.lee@mediatek.com wrote: > From: Jitao Shi <jitao.shi@mediatek.com> > > To comply with the panel sequence, hold the mipi signal to LP00 > before the dcs cmds transmission, > and pull the mipi signal high from LP00 to LP11 until the start of > the dcs cmds transmission. > The normal panel timing is : > (1) pp1800 DC pull up > (2) avdd & avee AC pull high > (3) lcm_reset pull high -> pull low -> pull high > (4) Pull MIPI signal high (LP11) -> initial code -> send video > data(HS mode) > The power-off sequence is reversed. > If dsi is not in cmd mode, then dsi will pull the mipi signal high in > the mtk_output_dsi_enable function. > The delay in lane_ready func is the reaction time of dsi_rx after > pulling up the mipi signal. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the drm_panel_bridge > API") > > Cc: <stable@vger.kernel.org> # 5.10.x: b255d51e3967: sched: Modify > dsi funcs to atomic operations > Cc: <stable@vger.kernel.org> # 5.10.x: 72c69c977502: sched: Separate > poweron/poweroff from enable/disable and define new funcs > Cc: <stable@vger.kernel.org> # 5.10.x > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 28 +++++++++++++++++++++------- > 1 file changed, 21 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c > b/drivers/gpu/drm/mediatek/mtk_dsi.c > index d9a6b928dba8..25e84d9426bf 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -203,6 +203,7 @@ struct mtk_dsi { > struct mtk_phy_timing phy_timing; > int refcount; > bool enabled; > + bool lanes_ready; > u32 irq_data; > wait_queue_head_t irq_wait_queue; > const struct mtk_dsi_driver_data *driver_data; > @@ -661,18 +662,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) > mtk_dsi_reset_engine(dsi); > mtk_dsi_phy_timconfig(dsi); > > - mtk_dsi_rxtx_control(dsi); > - usleep_range(30, 100); > - mtk_dsi_reset_dphy(dsi); > mtk_dsi_ps_control_vact(dsi); > mtk_dsi_set_vm_cmd(dsi); > mtk_dsi_config_vdo_timing(dsi); > mtk_dsi_set_interrupt_enable(dsi); > > - mtk_dsi_clk_ulp_mode_leave(dsi); > - mtk_dsi_lane0_ulp_mode_leave(dsi); > - mtk_dsi_clk_hs_mode(dsi, 0); > - > return 0; > err_disable_engine_clk: > clk_disable_unprepare(dsi->engine_clk); > @@ -701,6 +695,23 @@ static void mtk_dsi_poweroff(struct mtk_dsi > *dsi) > clk_disable_unprepare(dsi->digital_clk); > > phy_power_off(dsi->phy); > + > + dsi->lanes_ready = false; > +} > + > +static void mtk_dsi_lane_ready(struct mtk_dsi *dsi) > +{ > + if (!dsi->lanes_ready) { > + dsi->lanes_ready = true; > + mtk_dsi_rxtx_control(dsi); > + usleep_range(30, 100); > + mtk_dsi_reset_dphy(dsi); > + mtk_dsi_clk_ulp_mode_leave(dsi); > + mtk_dsi_lane0_ulp_mode_leave(dsi); > + mtk_dsi_clk_hs_mode(dsi, 0); > + msleep(20); > + /* The reaction time after pulling up the mipi signal > for dsi_rx */ > + } > } > > static void mtk_output_dsi_enable(struct mtk_dsi *dsi) > @@ -708,6 +719,7 @@ static void mtk_output_dsi_enable(struct mtk_dsi > *dsi) > if (dsi->enabled) > return; > > + mtk_dsi_lane_ready(dsi); > mtk_dsi_set_mode(dsi); > mtk_dsi_clk_hs_mode(dsi, 1); > > @@ -1017,6 +1029,8 @@ static ssize_t mtk_dsi_host_transfer(struct > mipi_dsi_host *host, > if (MTK_DSI_HOST_IS_READ(msg->type)) > irq_flag |= LPRX_RD_RDY_INT_FLAG; > > + mtk_dsi_lane_ready(dsi); > + > ret = mtk_dsi_host_send_cmd(dsi, msg, irq_flag); > if (ret) > goto restore_dsi_mode;
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index d9a6b928dba8..25e84d9426bf 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -203,6 +203,7 @@ struct mtk_dsi { struct mtk_phy_timing phy_timing; int refcount; bool enabled; + bool lanes_ready; u32 irq_data; wait_queue_head_t irq_wait_queue; const struct mtk_dsi_driver_data *driver_data; @@ -661,18 +662,11 @@ static int mtk_dsi_poweron(struct mtk_dsi *dsi) mtk_dsi_reset_engine(dsi); mtk_dsi_phy_timconfig(dsi); - mtk_dsi_rxtx_control(dsi); - usleep_range(30, 100); - mtk_dsi_reset_dphy(dsi); mtk_dsi_ps_control_vact(dsi); mtk_dsi_set_vm_cmd(dsi); mtk_dsi_config_vdo_timing(dsi); mtk_dsi_set_interrupt_enable(dsi); - mtk_dsi_clk_ulp_mode_leave(dsi); - mtk_dsi_lane0_ulp_mode_leave(dsi); - mtk_dsi_clk_hs_mode(dsi, 0); - return 0; err_disable_engine_clk: clk_disable_unprepare(dsi->engine_clk); @@ -701,6 +695,23 @@ static void mtk_dsi_poweroff(struct mtk_dsi *dsi) clk_disable_unprepare(dsi->digital_clk); phy_power_off(dsi->phy); + + dsi->lanes_ready = false; +} + +static void mtk_dsi_lane_ready(struct mtk_dsi *dsi) +{ + if (!dsi->lanes_ready) { + dsi->lanes_ready = true; + mtk_dsi_rxtx_control(dsi); + usleep_range(30, 100); + mtk_dsi_reset_dphy(dsi); + mtk_dsi_clk_ulp_mode_leave(dsi); + mtk_dsi_lane0_ulp_mode_leave(dsi); + mtk_dsi_clk_hs_mode(dsi, 0); + msleep(20); + /* The reaction time after pulling up the mipi signal for dsi_rx */ + } } static void mtk_output_dsi_enable(struct mtk_dsi *dsi) @@ -708,6 +719,7 @@ static void mtk_output_dsi_enable(struct mtk_dsi *dsi) if (dsi->enabled) return; + mtk_dsi_lane_ready(dsi); mtk_dsi_set_mode(dsi); mtk_dsi_clk_hs_mode(dsi, 1); @@ -1017,6 +1029,8 @@ static ssize_t mtk_dsi_host_transfer(struct mipi_dsi_host *host, if (MTK_DSI_HOST_IS_READ(msg->type)) irq_flag |= LPRX_RD_RDY_INT_FLAG; + mtk_dsi_lane_ready(dsi); + ret = mtk_dsi_host_send_cmd(dsi, msg, irq_flag); if (ret) goto restore_dsi_mode;