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Fri, 29 Jul 2022 12:37:12 -0700 Received: from [172.23.64.3] (port=58456 helo=xhdvnc103.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1oHVnL-000GzJ-TD; Fri, 29 Jul 2022 12:37:12 -0700 Received: by xhdvnc103.xilinx.com (Postfix, from userid 13245) id 3D16D1054B2; Sat, 30 Jul 2022 01:06:43 +0530 (IST) From: Radhey Shyam Pandey To: , , , , , , , CC: , , , , , "Radhey Shyam Pandey" Subject: [PATCH v2 net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support Date: Sat, 30 Jul 2022 01:05:50 +0530 Message-ID: <1659123350-10638-3-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1659123350-10638-1-git-send-email-radhey.shyam.pandey@amd.com> References: <1659123350-10638-1-git-send-email-radhey.shyam.pandey@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 11984e9e-8143-4202-be28-08da7199bcbf X-MS-TrafficTypeDiagnostic: DM5PR02MB3752:EE_ X-MS-Exchange-SenderADCheck: 0 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2022 19:37:13.6026 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 11984e9e-8143-4202-be28-08da7199bcbf X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: DM3NAM02FT048.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB3752 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220729_123720_097419_E8EDA9C3 X-CRM114-Status: GOOD ( 13.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for the dynamic configuration which takes care of configuring the GEM secure space configuration registers using EEMI APIs. High level sequence is to: - Check for the PM dynamic configuration support, if no error proceed with GEM dynamic configurations(next steps) otherwise skip the dynamic configuration. - Configure GEM Fixed configurations. - Configure GEM_CLK_CTRL (gemX_sgmii_mode). - Trigger GEM reset. Signed-off-by: Radhey Shyam Pandey Reviewed-by: Andrew Lunn Tested-by: Conor Dooley (for MPFS) --- Changes for v2: - Add phy_exit() in error return paths. --- drivers/net/ethernet/cadence/macb_main.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c index 4cd4f57ca2aa..517b40ff098b 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "macb.h" /* This structure is only used for MACB on SiFive FU540 devices */ @@ -4621,6 +4622,30 @@ static int init_reset_optional(struct platform_device *pdev) "failed to init SGMII PHY\n"); } + ret = zynqmp_pm_is_function_supported(PM_IOCTL, IOCTL_SET_GEM_CONFIG); + if (!ret) { + u32 pm_info[2]; + + ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains", + pm_info, ARRAY_SIZE(pm_info)); + if (ret < 0) { + phy_exit(bp->sgmii_phy); + dev_err(&pdev->dev, "Failed to read power management information\n"); + return ret; + } + ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_FIXED, 0); + if (ret < 0) { + phy_exit(bp->sgmii_phy); + return ret; + } + + ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_SGMII_MODE, 1); + if (ret < 0) { + phy_exit(bp->sgmii_phy); + return ret; + } + } + /* Fully reset controller at hardware level if mapped in device tree */ ret = device_reset_optional(&pdev->dev); if (ret) {