From patchwork Fri Sep 16 13:35:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 9335831 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 38A5E60839 for ; Fri, 16 Sep 2016 13:37:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2BD4129F9E for ; Fri, 16 Sep 2016 13:37:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1EF8829FA3; Fri, 16 Sep 2016 13:37:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0969829FA6 for ; Fri, 16 Sep 2016 13:37:15 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bktIt-0003BT-3b; Fri, 16 Sep 2016 13:35:43 +0000 Received: from mail-lf0-x236.google.com ([2a00:1450:4010:c07::236]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bktIi-00029z-GI for linux-arm-kernel@lists.infradead.org; Fri, 16 Sep 2016 13:35:35 +0000 Received: by mail-lf0-x236.google.com with SMTP id g62so62012902lfe.3 for ; Fri, 16 Sep 2016 06:35:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:organization:user-agent :in-reply-to:references:mime-version:content-transfer-encoding; bh=GDiuKkMYUrwvCUdtROFFVgwfa95i6WwfVrdh8/ADwxU=; b=Pi27o9J9ZqM27xFaWni0prfVIiwnmayLjWKwN9HTOZoT2NBMupFRFFFaeK8q9mMXjS A0CzXAU9twdGClSTZCym0hwIgiLb+V0x0dQYMszNRgcBa4+/AuBuNAD0PEZD+bMe+g9y qM3gjt2VLd+HSYcA2PN4J9WjnEoFM3nRgVtjJ5MJBZlAArMd/wIaiWORicbY94+wkENo uznkQbLBGkjoEDX/N3uVQwcxl8wXS1fu13T4/j1MdIeJoC0jfsokXYF5jemuew6h4A+u RHrkLtr3ZZnQous5sznz5U0tL2LK3u1+6SwHMgBORkNmm5ANjR6SN95UC3f2Rg+4oCNE 1emw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding; bh=GDiuKkMYUrwvCUdtROFFVgwfa95i6WwfVrdh8/ADwxU=; b=iXZXDOSTEqNKrqzTVmOcpaCzclZ3d9wDHfZAYyIGGdSnOKccw7kJDJs5SJkXcsowlj OO1hwdJEMsYl9HvTgKpc6IlPRqHFEJPvymFIHiInPhYMqU+pwlE+2PcZLpVkXi8fv/wp 4kiI2vg/g9NKvEWKvjjWjlHfhaXGJW755bf8/zjJW58Jdvbk8VnbxjOih29u8hO9B/AO IBsLQjdUV2ic6Yq+2CBdQNp3eaGsyrUGzXuTK0ZJlflw0i1hNTXjMQwqb4A9HtQZP1kO OdnJATlSQTnnL2T/Dq82RyyoAGgQVFvOUPGS62dRiOuGwvqZjllcOCaw+kKVcZHlTu1F LQOQ== X-Gm-Message-State: AE9vXwOUoiV2r5uYXsyPshLfttSWhAuv9QyZwqLk3u0V88NGFSNdpN0WVS9h+u3x9anIlQ== X-Received: by 10.25.147.193 with SMTP id v184mr5861670lfd.43.1474032910365; Fri, 16 Sep 2016 06:35:10 -0700 (PDT) Received: from wasted.cogentembedded.com ([31.173.81.193]) by smtp.gmail.com with ESMTPSA id f3sm2325463lff.21.2016.09.16.06.35.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Sep 2016 06:35:09 -0700 (PDT) From: Sergei Shtylyov To: horms@verge.net.au, linux-renesas-soc@vger.kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Subject: [PATCH RFC 5/8] ARM: dts: r8a7743: initial SoC device tree Date: Fri, 16 Sep 2016 16:35:08 +0300 Message-ID: <1679762.ECpvSkQAyM@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.10 (Linux/4.7.2-101.fc23.x86_64; KDE/4.14.20; x86_64; ; ) In-Reply-To: <3533019.Wim1Kuh1ic@wasted.cogentembedded.com> References: <3533019.Wim1Kuh1ic@wasted.cogentembedded.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160916_063532_832414_A76754B2 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux@arm.linux.org.uk, magnus.damm@gmail.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The initial R8A7743 SoC device tree including CPU cores, GIC, timer, SYSC, and the required clock descriptions. Based on the original (and large) patch by Dmitry Shifrin . Signed-off-by: Sergei Shtylyov --- arch/arm/boot/dts/r8a7743.dtsi | 210 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 210 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7743.dtsi =================================================================== --- /dev/null +++ renesas/arch/arm/boot/dts/r8a7743.dtsi @@ -0,0 +1,210 @@ +/* + * Device Tree Source for the r8a7743 SoC + * + * Copyright (C) 2016 Cogent Embedded Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include + +/ { + compatible = "renesas,r8a7743"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0>; + clock-frequency = <1500000000>; + clocks = <&cpg_clocks R8A7743_CLK_Z>; + power-domains = <&sysc R8A7743_PD_CA15_CPU0>; + next-level-cache = <&L2_CA15>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clock-frequency = <1500000000>; + power-domains = <&sysc R8A7743_PD_CA15_CPU1>; + next-level-cache = <&L2_CA15>; + }; + + L2_CA15: cache-controller@0 { + compatible = "cache"; + reg = <0>; + cache-unified; + cache-level = <2>; + power-domains = <&sysc R8A7743_PD_CA15_SCU>; + }; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@f1001000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0xf1001000 0 0x1000>, + <0 0xf1002000 0 0x1000>, + <0 0xf1004000 0 0x2000>, + <0 0xf1006000 0 0x2000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + }; + + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7743-sysc"; + reg = <0 0xe6180000 0 0x0200>; + #power-domain-cells = <1>; + }; + + /* Special CPG clocks */ + cpg_clocks: cpg_clocks@e6150000 { + compatible = "renesas,r8a7743-cpg-clocks", + "renesas,rcar-gen2-cpg-clocks"; + reg = <0 0xe6150000 0 0x1000>; + clocks = <&extal_clk &usb_extal_clk>; + #clock-cells = <1>; + clock-output-names = "main", "pll0", "pll1", "pll3", + "lb", "qspi", "sdh", "sd0", "z", + "rcan"; + #power-domain-cells = <0>; + }; + + /* Fixed factor clocks */ + pll1_div2_clk: pll1_div2 { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7743_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <2>; + clock-mult = <1>; + }; + zs_clk: zs { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7743_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <6>; + clock-mult = <1>; + }; + p_clk: p { + compatible = "fixed-factor-clock"; + clocks = <&cpg_clocks R8A7743_CLK_PLL1>; + #clock-cells = <0>; + clock-div = <24>; + clock-mult = <1>; + }; + mp_clk: mp { + compatible = "fixed-factor-clock"; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-div = <15>; + clock-mult = <1>; + }; + + /* Gate clocks */ + mstp2_clks: mstp2_clks@e6150138 { + compatible = "renesas,r8a7743-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; + clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, + <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7743_CLK_SCIFA2 R8A7743_CLK_SCIFA1 + R8A7743_CLK_SCIFA0 R8A7743_CLK_SCIFB0 + R8A7743_CLK_SCIFB1 R8A7743_CLK_SCIFB2 + R8A7743_CLK_SYS_DMAC1 R8A7743_CLK_SYS_DMAC0 + >; + clock-output-names = + "scifa2", "scifa1", "scifa0", + "scifb0", "scifb1", "scifb2", + "sys-dmac1", "sys-dmac0"; + }; + mstp7_clks: mstp7_clks@e615014c { + compatible = "renesas,r8a7743-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; + clocks = <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, + <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, + <&p_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7743_CLK_HSCIF2 R8A7743_CLK_SCIF5 + R8A7743_CLK_SCIF4 R8A7743_CLK_HSCIF1 + R8A7743_CLK_HSCIF0 R8A7743_CLK_SCIF3 + R8A7743_CLK_SCIF2 R8A7743_CLK_SCIF1 + R8A7743_CLK_SCIF0 + >; + clock-output-names = + "hscif2", "scif5", "scif4", "hscif1", "hscif0", + "scif3", "scif2", "scif1", "scif0"; + }; + mstp11_clks: mstp11_clks@e615099c { + compatible = "renesas,r8a7743-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; + clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7743_CLK_SCIFA3 R8A7743_CLK_SCIFA4 + R8A7743_CLK_SCIFA5 + >; + clock-output-names = "scifa3", "scifa4", "scifa5"; + }; + }; + + /* External root clock */ + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overriden by the board. */ + clock-frequency = <0>; + }; + + /* External USB clock - can be overridden by the board */ + usb_extal_clk: usb_extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + + /* External SCIF clock */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board. */ + clock-frequency = <0>; + }; +};