diff mbox series

[v1] firmware: imx: scu-pd: Add missed PCIEA SATA0 and SERDES0 power domains

Message ID 1692949635-27223-1-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
State New, archived
Headers show
Series [v1] firmware: imx: scu-pd: Add missed PCIEA SATA0 and SERDES0 power domains | expand

Commit Message

Hongxing Zhu Aug. 25, 2023, 7:47 a.m. UTC
Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/firmware/imx/scu-pd.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Marcel Ziswiler Aug. 26, 2023, 7:34 a.m. UTC | #1
Hi Richard Zhu

Thanks!

How about the dc1 and gpu1 ones?

On Fri, 2023-08-25 at 15:47 +0800, Richard Zhu wrote:
> Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

> ---
>  drivers/firmware/imx/scu-pd.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
> index 84b673427073..7b8c2689b49c 100644
> --- a/drivers/firmware/imx/scu-pd.c
> +++ b/drivers/firmware/imx/scu-pd.c
> @@ -165,7 +165,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
>         { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
>  
>         /* HSIO SS */
> +       { "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 },
>         { "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
> +       { "sata-0", IMX_SC_R_SATA_0, 1, false, 0 },
> +       { "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 },
>         { "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
>         { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },

Cheers

Marcel
Hongxing Zhu Aug. 28, 2023, 1:11 a.m. UTC | #2
> -----Original Message-----
> From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Sent: 2023年8月26日 15:34
> To: s.hauer@pengutronix.de; festevam@gmail.com; Clark Wang
> <xiaoning.wang@nxp.com>; Frank Li <frank.li@nxp.com>; Hongxing Zhu
> <hongxing.zhu@nxp.com>; shawnguo@kernel.org
> Cc: linux-arm-kernel@lists.infradead.org; kernel@pengutronix.de;
> linux-kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH v1] firmware: imx: scu-pd: Add missed PCIEA SATA0 and
> SERDES0 power domains
> 
> Hi Richard Zhu
> 
> Thanks!
> 
> How about the dc1 and gpu1 ones?
> 
> On Fri, 2023-08-25 at 15:47 +0800, Richard Zhu wrote:
> > Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> 
> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> 
Hi Marcel:
Thanks.
I just add the HSIO SS PDs, and verified with my local HSIO support patches.
Since I can't verify the dc1 and gpu1 ones now, so I didn't add them this time.

Best Regards
Richard Zhu

> > ---
> >  drivers/firmware/imx/scu-pd.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/firmware/imx/scu-pd.c
> > b/drivers/firmware/imx/scu-pd.c index 84b673427073..7b8c2689b49c
> > 100644
> > --- a/drivers/firmware/imx/scu-pd.c
> > +++ b/drivers/firmware/imx/scu-pd.c
> > @@ -165,7 +165,10 @@ static const struct imx_sc_pd_range
> > imx8qxp_scu_pd_ranges[] = {
> >         { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
> >
> >         /* HSIO SS */
> > +       { "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 },
> >         { "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
> > +       { "sata-0", IMX_SC_R_SATA_0, 1, false, 0 },
> > +       { "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 },
> >         { "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
> >         { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
> 
> Cheers
> 
> Marcel
Shawn Guo Sept. 24, 2023, 2:07 p.m. UTC | #3
On Fri, Aug 25, 2023 at 03:47:15PM +0800, Richard Zhu wrote:
> Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

It doesn't apply to v6.6-rc.  Could you rebase?

Shawn

> ---
>  drivers/firmware/imx/scu-pd.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
> index 84b673427073..7b8c2689b49c 100644
> --- a/drivers/firmware/imx/scu-pd.c
> +++ b/drivers/firmware/imx/scu-pd.c
> @@ -165,7 +165,10 @@ static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
>  	{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
>  
>  	/* HSIO SS */
> +	{ "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 },
>  	{ "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
> +	{ "sata-0", IMX_SC_R_SATA_0, 1, false, 0 },
> +	{ "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 },
>  	{ "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
>  	{ "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
>  
> -- 
> 2.34.1
>
Shawn Guo Sept. 25, 2023, 12:24 a.m. UTC | #4
On Sun, Sep 24, 2023 at 10:07 PM Shawn Guo <shawnguo@kernel.org> wrote:
>
> On Fri, Aug 25, 2023 at 03:47:15PM +0800, Richard Zhu wrote:
> > Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
>
> It doesn't apply to v6.6-rc.  Could you rebase?

To be clear, my branch is built on v6.6-rc1, so please rebase against
that, thanks!

Shawn
Hongxing Zhu Sept. 25, 2023, 1:48 a.m. UTC | #5
Hi Shawn:
Sorry to reply late.

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2023年9月25日 8:24
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: s.hauer@pengutronix.de; festevam@gmail.com; Marcel Ziswiler
> <marcel.ziswiler@toradex.com>; Frank Li <frank.li@nxp.com>; Clark Wang
> <xiaoning.wang@nxp.com>; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> <linux-imx@nxp.com>
> Subject: Re: [PATCH v1] firmware: imx: scu-pd: Add missed PCIEA SATA0 and
> SERDES0 power domains
> 
> On Sun, Sep 24, 2023 at 10:07 PM Shawn Guo <shawnguo@kernel.org> wrote:
> >
> > On Fri, Aug 25, 2023 at 03:47:15PM +0800, Richard Zhu wrote:
> > > Add missed PCIEA, SATA0 and SERDES0 power domains for HSIO SS.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> >
> > It doesn't apply to v6.6-rc.  Could you rebase?
> 
> To be clear, my branch is built on v6.6-rc1, so please rebase against that, thanks!

These changes had been merged by the following commit issued by Fan peng in
 another topic.
Please ignore this patch.

commit a67d780720ff406943d56286bc06aa60c2b59d3a
Author: Peng Fan <peng.fan@nxp.com>
Date:   Mon Aug 14 18:41:22 2023 +0800

    genpd: imx: scu-pd: add more PDs

    Add more PDs for i.MX8QM and i.MX8DXL, including
    dma-ch, esai, gpu1, v2x-mu, seco-mu, hdmi, img and etc.

    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/genpd/imx/scu-pd.c b/drivers/genpd/imx/scu-pd.c
index 5a28f5af592a..08583a10ac62 100644
--- a/drivers/genpd/imx/scu-pd.c
+++ b/drivers/genpd/imx/scu-pd.c

Best Regards
Richard Zhu

> 
> Shawn
diff mbox series

Patch

diff --git a/drivers/firmware/imx/scu-pd.c b/drivers/firmware/imx/scu-pd.c
index 84b673427073..7b8c2689b49c 100644
--- a/drivers/firmware/imx/scu-pd.c
+++ b/drivers/firmware/imx/scu-pd.c
@@ -165,7 +165,10 @@  static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
 	{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
 
 	/* HSIO SS */
+	{ "pcie-a", IMX_SC_R_PCIE_A, 1, false, 0 },
 	{ "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
+	{ "sata-0", IMX_SC_R_SATA_0, 1, false, 0 },
+	{ "serdes-0", IMX_SC_R_SERDES_0, 1, false, 0 },
 	{ "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
 	{ "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },