From patchwork Tue Jul 16 03:18:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 13734024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A388EC3DA49 for ; Tue, 16 Jul 2024 03:37:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zt7ga1plXZf7qJRpMwc2f3Jke4HLppdYFgmhCV57cIw=; b=imDlqte+VPCQk3PsDdgzObI7Dc I3rjUCZtEIdJxcDiz4ztV04Dni64sYTreoCKUIH7col9QFc46yU75s2j2bB11EI3Q5ycKSvbgwEkJ zTA9gKZTqUCo3hsK1XnEBFw/aWiuzOzF3FXPHXfrwKNwHJOH7O0lGsk9LXMsNQobhCdd6ELOByAsr cBK+0pu6UypV0EKs9FcMBslOvzKw3EAEco/u1Kk0ymS2Z3W6FG8NAyfxrQll+2O3NpQfZw6UAWoUm 608fQBHVW8tBLf54aMdvr0g2ivvfqZBCcNBDd7sEhJIDHlaXjfQpITIHaJ8WPeFfzT1lduMCdf4S0 AECqOIZA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTZ0E-00000009BWS-3JLS; Tue, 16 Jul 2024 03:37:22 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTYzd-00000009BKT-2cmn for linux-arm-kernel@lists.infradead.org; Tue, 16 Jul 2024 03:36:47 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id F0B841A092E; Tue, 16 Jul 2024 05:36:43 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B989F1A0914; Tue, 16 Jul 2024 05:36:43 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id C5835180222B; Tue, 16 Jul 2024 11:36:41 +0800 (+08) From: Richard Zhu To: tj@kernel.org, dlemoal@kernel.org, cassel@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com Cc: linux-ide@vger.kernel.org, stable@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, kernel@pengutronix.de, Richard Zhu Subject: [PATCH v3 1/4] dt-bindings: ata: Add i.MX8QM AHCI compatible string Date: Tue, 16 Jul 2024 11:18:12 +0800 Message-Id: <1721099895-26098-2-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1721099895-26098-1-git-send-email-hongxing.zhu@nxp.com> References: <1721099895-26098-1-git-send-email-hongxing.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_203645_939955_AC40F55D X-CRM114-Status: UNSURE ( 9.51 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add i.MX8QM AHCI "fsl,imx8qm-ahci" compatible strings. i.MX8QM AHCI SATA doesn't require AHB clock rate to set the vendor specified TIMER1MS register. ahb clock is not required by i.MX8QM AHCI. Update the description of clocks in the dt-binding accordingly. Signed-off-by: Richard Zhu Reviewed-by: Rob Herring (Arm) --- .../devicetree/bindings/ata/imx-sata.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/imx-sata.yaml b/Documentation/devicetree/bindings/ata/imx-sata.yaml index 68ffb97ddc9b2..f4eb3550a0960 100644 --- a/Documentation/devicetree/bindings/ata/imx-sata.yaml +++ b/Documentation/devicetree/bindings/ata/imx-sata.yaml @@ -19,6 +19,7 @@ properties: - fsl,imx53-ahci - fsl,imx6q-ahci - fsl,imx6qp-ahci + - fsl,imx8qm-ahci reg: maxItems: 1 @@ -27,12 +28,14 @@ properties: maxItems: 1 clocks: + minItems: 2 items: - description: sata clock - description: sata reference clock - description: ahb clock clock-names: + minItems: 2 items: - const: sata - const: sata_ref @@ -58,6 +61,25 @@ properties: $ref: /schemas/types.yaml#/definitions/flag description: if present, disable spread-spectrum clocking on the SATA link. + phys: + items: + - description: phandle to SATA PHY. + Since "REXT" pin is only present for first lane of i.MX8QM PHY, it's + calibration result will be stored, passed through second lane, and + shared with all three lanes PHY. The first two lanes PHY are used as + calibration PHYs, although only the third lane PHY is used by SATA. + - description: phandle to the first lane PHY of i.MX8QM. + - description: phandle to the second lane PHY of i.MX8QM. + + phy-names: + items: + - const: sata-phy + - const: cali-phy0 + - const: cali-phy1 + + power-domains: + maxItems: 1 + required: - compatible - reg @@ -65,6 +87,31 @@ required: - clocks - clock-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - fsl,imx53-ahci + - fsl,imx6q-ahci + - fsl,imx6qp-ahci + then: + properties: + clock-names: + minItems: 3 + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8qm-ahci + then: + properties: + clock-names: + minItems: 2 + additionalProperties: false examples: