diff mbox series

[v2,1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe

Message ID 1727245477-15961-2-git-send-email-hongxing.zhu@nxp.com (mailing list archive)
State New, archived
Headers show
Series A bunch of changes to refine i.MX PCIe driver | expand

Commit Message

Hongxing Zhu Sept. 25, 2024, 6:24 a.m. UTC
Previous reference clock of i.MX95 is on when system boot to kernel. But
boot firmware change the behavor, it is off when boot. So it needs be turn
on when it is used. Also it needs be turn off/on when suspend and resume.

Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and keep
the same restriction with other compatible string.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 .../bindings/pci/fsl,imx6q-pcie-common.yaml   |  4 +--
 .../bindings/pci/fsl,imx6q-pcie.yaml          | 25 ++++++++++++++++---
 2 files changed, 23 insertions(+), 6 deletions(-)

Comments

Krzysztof Kozlowski Sept. 25, 2024, 7:50 a.m. UTC | #1
On Wed, Sep 25, 2024 at 02:24:29PM +0800, Richard Zhu wrote:
> Previous reference clock of i.MX95 is on when system boot to kernel. But
> boot firmware change the behavor, it is off when boot. So it needs be turn
> on when it is used. Also it needs be turn off/on when suspend and resume.

That's an old platform... How come that you changed bootloader just now?
Like 7 or 8 years after?

For the future: you should document all clock inputs, not only ones
needed for given bootloader...

> 
> Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and keep
> the same restriction with other compatible string.

<form letter>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC (and consider --no-git-fallback argument). It might
happen, that command when run on an older kernel, gives you outdated
entries. Therefore please be sure you base your patches on recent Linux
kernel.

Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline) or work on fork of kernel
(don't, instead use mainline). Just use b4 and everything should be
fine, although remember about  if you added new
patches to the patchset.
</form letter>

and I was wondering why I cannot find this and previous thread in my
inbox... So please stop developing on two year old kernels (and before
you say "I do not", well, then fix way how you use tools).


> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>  .../bindings/pci/fsl,imx6q-pcie-common.yaml   |  4 +--
>  .../bindings/pci/fsl,imx6q-pcie.yaml          | 25 ++++++++++++++++---
>  2 files changed, 23 insertions(+), 6 deletions(-)
> 

You missed to update ep binding.

Best regards,
Krzysztof
Frank Li Sept. 25, 2024, 4:46 p.m. UTC | #2
On Wed, Sep 25, 2024 at 09:50:06AM +0200, Krzysztof Kozlowski wrote:
> On Wed, Sep 25, 2024 at 02:24:29PM +0800, Richard Zhu wrote:
> > Previous reference clock of i.MX95 is on when system boot to kernel. But
> > boot firmware change the behavor, it is off when boot. So it needs be turn
> > on when it is used. Also it needs be turn off/on when suspend and resume.
>
> That's an old platform... How come that you changed bootloader just now?
> Like 7 or 8 years after?

It is new platform, which just publish in this year. Old platform reference
clock was controlled in PCI module, so needn't export to DT. So we have
not realized it when start i.MX95 work.

>
> For the future: you should document all clock inputs, not only ones
> needed for given bootloader...

Understand.

>
> >
> > Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and keep
> > the same restriction with other compatible string.
>
> <form letter>
> Please use scripts/get_maintainers.pl to get a list of necessary people
> and lists to CC (and consider --no-git-fallback argument). It might
> happen, that command when run on an older kernel, gives you outdated
> entries. Therefore please be sure you base your patches on recent Linux
> kernel.
>
> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
> people, so fix your workflow. Tools might also fail if you work on some
> ancient tree (don't, instead use mainline) or work on fork of kernel
> (don't, instead use mainline). Just use b4 and everything should be
> fine, although remember about  if you added new
> patches to the patchset.
> </form letter>
>
> and I was wondering why I cannot find this and previous thread in my
> inbox... So please stop developing on two year old kernels (and before
> you say "I do not", well, then fix way how you use tools).
>
>
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >  .../bindings/pci/fsl,imx6q-pcie-common.yaml   |  4 +--
> >  .../bindings/pci/fsl,imx6q-pcie.yaml          | 25 ++++++++++++++++---
> >  2 files changed, 23 insertions(+), 6 deletions(-)
> >
>
> You missed to update ep binding.

So far, EP don't need reference clock. PCIe standard require host provide
100MHz reference clock to EP side. But EP side can choose use itself's
clock or reference clock from PCIe bus. Currently i.MX95 only support clock
from internal PLL when work as EP mode.

Frank

>
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski Sept. 25, 2024, 7:28 p.m. UTC | #3
On 25/09/2024 18:46, Frank Li wrote:
> On Wed, Sep 25, 2024 at 09:50:06AM +0200, Krzysztof Kozlowski wrote:
>> On Wed, Sep 25, 2024 at 02:24:29PM +0800, Richard Zhu wrote:
>>> Previous reference clock of i.MX95 is on when system boot to kernel. But
>>> boot firmware change the behavor, it is off when boot. So it needs be turn
>>> on when it is used. Also it needs be turn off/on when suspend and resume.
>>
>> That's an old platform... How come that you changed bootloader just now?
>> Like 7 or 8 years after?
> 
> It is new platform, which just publish in this year. Old platform reference
> clock was controlled in PCI module, so needn't export to DT. So we have
> not realized it when start i.MX95 work.

Indeed, I missed that it is i.MX95, not i.MX6q.

> 
>>
>> For the future: you should document all clock inputs, not only ones
>> needed for given bootloader...
> 
> Understand.

Sorry, in case of early upstreaming it's understandable.

> 
>>
>>>
>>> Add one ref clock for i.MX95 PCIe. Increase clocks' maxItems to 5 and keep
>>> the same restriction with other compatible string.
>>
>> <form letter>
>> Please use scripts/get_maintainers.pl to get a list of necessary people
>> and lists to CC (and consider --no-git-fallback argument). It might
>> happen, that command when run on an older kernel, gives you outdated
>> entries. Therefore please be sure you base your patches on recent Linux
>> kernel.
>>
>> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
>> people, so fix your workflow. Tools might also fail if you work on some
>> ancient tree (don't, instead use mainline) or work on fork of kernel
>> (don't, instead use mainline). Just use b4 and everything should be
>> fine, although remember about  if you added new
>> patches to the patchset.
>> </form letter>
>>
>> and I was wondering why I cannot find this and previous thread in my
>> inbox... So please stop developing on two year old kernels (and before
>> you say "I do not", well, then fix way how you use tools).
>>
>>
>>>
>>> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
>>> ---
>>>  .../bindings/pci/fsl,imx6q-pcie-common.yaml   |  4 +--
>>>  .../bindings/pci/fsl,imx6q-pcie.yaml          | 25 ++++++++++++++++---
>>>  2 files changed, 23 insertions(+), 6 deletions(-)
>>>
>>
>> You missed to update ep binding.
> 
> So far, EP don't need reference clock. PCIe standard require host provide
> 100MHz reference clock to EP side. But EP side can choose use itself's
> clock or reference clock from PCIe bus. Currently i.MX95 only support clock
> from internal PLL when work as EP mode.

But this patch allowed certain existing variants in EP to have 5 clocks.
You missed to update EP binding...

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
index a8b34f58f8f4..cddbe21f99f2 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
@@ -17,11 +17,11 @@  description:
 properties:
   clocks:
     minItems: 3
-    maxItems: 4
+    maxItems: 5
 
   clock-names:
     minItems: 3
-    maxItems: 4
+    maxItems: 5
 
   num-lanes:
     const: 1
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 1e05c560d797..4c76cd3f98a9 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -40,10 +40,11 @@  properties:
       - description: PCIe PHY clock.
       - description: Additional required clock entry for imx6sx-pcie,
            imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
+      - description: PCIe reference clock.
 
   clock-names:
     minItems: 3
-    maxItems: 4
+    maxItems: 5
 
   interrupts:
     items:
@@ -127,7 +128,7 @@  allOf:
     then:
       properties:
         clocks:
-          minItems: 4
+          maxItems: 4
         clock-names:
           items:
             - const: pcie
@@ -140,11 +141,10 @@  allOf:
         compatible:
           enum:
             - fsl,imx8mq-pcie
-            - fsl,imx95-pcie
     then:
       properties:
         clocks:
-          minItems: 4
+          maxItems: 4
         clock-names:
           items:
             - const: pcie
@@ -200,6 +200,23 @@  allOf:
             - const: mstr
             - const: slv
 
+  - if:
+      properties:
+        compatible:
+          enum:
+            - fsl,imx95-pcie
+    then:
+      properties:
+        clocks:
+          maxItems: 5
+        clock-names:
+          items:
+            - const: pcie
+            - const: pcie_bus
+            - const: pcie_phy
+            - const: pcie_aux
+            - const: ref
+
 unevaluatedProperties: false
 
 examples: