| Message ID | 1731942491-1992368-1-git-send-email-radhey.shyam.pandey@amd.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] usb: dwc3: xilinx: make sure pipe clock is deselected in usb2 only mode | expand |
On 11/18/24 16:08, Radhey Shyam Pandey wrote: > From: Neal Frager <neal.frager@amd.com> > > When the USB3 PHY is not defined in the Linux device tree, there could > still be a case where there is a USB3 PHY is active on the board and 2nd "is " should be dropped. This sounds a bit confusing to me as the PHY is on-chip on zynqmp, maybe you are referring to a reference clock input to the PS-GTR instead? > enabled by the first stage bootloader. If serdes clock is being used > then the USB will fail to enumerate devices in 2.0 only mode. > > To solve this, make sure that the PIPE clock is deselected whenever the > USB3 PHY is not defined and guarantees that the USB2 only mode will work > in all cases. > > Fixes: 9678f3361afc ("usb: dwc3: xilinx: Skip resets and USB3 register settings for USB2.0 mode") > Cc: stable@vger.kernel.org > Signed-off-by: Neal Frager <neal.frager@amd.com> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> > --- > Changes for v2: > - Add stable@vger.kernel.org in CC. Other than that looks good, thanks. Acked-by: Peter Korsgaard <peter@korsgaard.com> > --- > drivers/usb/dwc3/dwc3-xilinx.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c > index e3738e1610db..a33a42ba0249 100644 > --- a/drivers/usb/dwc3/dwc3-xilinx.c > +++ b/drivers/usb/dwc3/dwc3-xilinx.c > @@ -121,8 +121,11 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) > * in use but the usb3-phy entry is missing from the device tree. > * Therefore, skip these operations in this case. > */ > - if (!priv_data->usb3_phy) > + if (!priv_data->usb3_phy) { > + /* Deselect the PIPE Clock Select bit in FPD PIPE Clock register */ > + writel(PIPE_CLK_DESELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK); > goto skip_usb3_phy; > + } > > crst = devm_reset_control_get_exclusive(dev, "usb_crst"); > if (IS_ERR(crst)) { > > base-commit: 744cf71b8bdfcdd77aaf58395e068b7457634b2c
diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c index e3738e1610db..a33a42ba0249 100644 --- a/drivers/usb/dwc3/dwc3-xilinx.c +++ b/drivers/usb/dwc3/dwc3-xilinx.c @@ -121,8 +121,11 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_data) * in use but the usb3-phy entry is missing from the device tree. * Therefore, skip these operations in this case. */ - if (!priv_data->usb3_phy) + if (!priv_data->usb3_phy) { + /* Deselect the PIPE Clock Select bit in FPD PIPE Clock register */ + writel(PIPE_CLK_DESELECT, priv_data->regs + XLNX_USB_FPD_PIPE_CLK); goto skip_usb3_phy; + } crst = devm_reset_control_get_exclusive(dev, "usb_crst"); if (IS_ERR(crst)) {