From patchwork Wed May 21 11:41:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Appana Durga Kedareswara rao X-Patchwork-Id: 4216351 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A81B29F1CD for ; Wed, 21 May 2014 11:44:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CF1602038E for ; Wed, 21 May 2014 11:44:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 03D15201EC for ; Wed, 21 May 2014 11:44:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wn4uQ-0007NI-Nd; Wed, 21 May 2014 11:42:10 +0000 Received: from mail-by2ln0151.outbound.protection.outlook.com ([2a01:111:f400:7c0c::151] helo=na01-by2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Wn4uN-0007H4-00 for linux-arm-kernel@lists.infradead.org; Wed, 21 May 2014 11:42:08 +0000 Received: from BN1BFFO11FD053.protection.gbl (10.58.144.33) by BN1BFFO11HUB025.protection.gbl (10.58.144.172) with Microsoft SMTP Server (TLS) id 15.0.949.9; Wed, 21 May 2014 11:41:42 +0000 Received: from xsj-gw1 (149.199.60.83) by BN1BFFO11FD053.mail.protection.outlook.com (10.58.145.8) with Microsoft SMTP Server id 15.0.949.9 via Frontend Transport; Wed, 21 May 2014 11:41:42 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-smtp1) by xsj-gw1 with esmtp (Exim 4.63) (envelope-from ) id 1Wn4tx-0006bV-Rl; Wed, 21 May 2014 04:41:41 -0700 From: Kedareswara rao Appana To: , , , , , , Subject: [PATCH v8 1/2] can: Add xilinx CAN device tree bindings documentation. Date: Wed, 21 May 2014 17:11:29 +0530 X-Mailer: git-send-email 1.7.4 X-RCIS-Action: ALLOW Message-ID: <17489036-3743-4393-afc6-a9064325b4d5@BN1BFFO11FD053.protection.gbl> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; IPV:NLI; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(438001)(189002)(199002)(50226001)(88136002)(44976005)(87936001)(77982001)(20776003)(4396001)(64706001)(47776003)(93916002)(33646001)(74662001)(48376002)(74502001)(19580395003)(19580405001)(83322001)(76482001)(80022001)(79102001)(53416003)(21056001)(46102001)(31696002)(70736001)(62966002)(81342001)(50986999)(92726001)(83072002)(85852003)(2201001)(89996001)(102836001)(87286001)(77156001)(50466002)(99396002)(74316001)(86362001)(81542001)(23106003); DIR:OUT; SFP:; SCL:1; SRVR:BN1BFFO11HUB025; H:xsj-gw1; FPR:; MLV:sfv; PTR:unknown-60-83.xilinx.com; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-OriginatorOrg: xilinx.onmicrosoft.com X-Forefront-PRVS: 0218A015FA Received-SPF: Pass (: domain of xilinx.com designates 149.199.60.83 as permitted sender) receiver=; client-ip=149.199.60.83; helo=xsj-gw1; Authentication-Results: spf=pass (sender IP is 149.199.60.83) smtp.mailfrom=appana.durga.rao@xilinx.com; X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140521_044207_173711_A0BA0AEB X-CRM114-Status: UNSURE ( 7.68 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-can@vger.kernel.org, Kedareswara rao Appana , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add xilinx CAN bindings documentation. Signed-off-by: Kedareswara rao Appana --- Changes for v8: - None. Changes for v7: - Split the devicetree bindings doc as a seperate patch --- .../devicetree/bindings/net/can/xilinx_can.txt | 44 ++++++++++++++++++++ 1 files changed, 44 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/can/xilinx_can.txt diff --git a/Documentation/devicetree/bindings/net/can/xilinx_can.txt b/Documentation/devicetree/bindings/net/can/xilinx_can.txt new file mode 100644 index 0000000..fe38847 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/xilinx_can.txt @@ -0,0 +1,44 @@ +Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings +--------------------------------------------------------- + +Required properties: +- compatible : Should be "xlnx,zynq-can-1.0" for Zynq CAN + controllers and "xlnx,axi-can-1.00.a" for Axi CAN + controllers. +- reg : Physical base address and size of the Axi CAN/Zynq + CANPS registers map. +- interrupts : Property with a value describing the interrupt + number. +- interrupt-parent : Must be core interrupt controller +- clock-names : List of input clock names - "can_clk", "pclk" + (For CANPS), "can_clk" , "s_axi_aclk"(For AXI CAN) + (See clock bindings for details). +- clocks : Clock phandles (see clock bindings for details). +- tx-fifo-depth : Can Tx fifo depth. +- rx-fifo-depth : Can Rx fifo depth. + + +Example: + +For Zynq CANPS Dts file: + zynq_can_0: can@e0008000 { + compatible = "xlnx,zynq-can-1.0"; + clocks = <&clkc 19>, <&clkc 36>; + clock-names = "can_clk", "pclk"; + reg = <0xe0008000 0x1000>; + interrupts = <0 28 4>; + interrupt-parent = <&intc>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; +For Axi CAN Dts file: + axi_can_0: axi-can@40000000 { + compatible = "xlnx,axi-can-1.00.a"; + clocks = <&clkc 0>, <&clkc 1>; + clock-names = "can_clk","s_axi_aclk" ; + reg = <0x40000000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <0 59 1>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + };