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Tue, 6 Aug 2024 19:12:02 -0700 From: Nicolin Chen To: CC: , , , , , , , , , Subject: [PATCH v11 5/9] iommu/arm-smmu-v3: Make symbols public for CONFIG_TEGRA241_CMDQV Date: Tue, 6 Aug 2024 19:11:50 -0700 Message-ID: <1972ecc4d24189a055728609f130430b1e1cdd75.1722993435.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3D:EE_|CY8PR12MB7147:EE_ X-MS-Office365-Filtering-Correlation-Id: e68ec2b8-d20a-4806-8042-08dcb6865d05 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; X-Microsoft-Antispam-Message-Info: 8Hf3sQxKEgWpBZoakR9BNY2YQurhvSuDBM35UOyHrKlti3C29tAHAeIsNt3OphZTjm4ddypx3xAkVRyzQa7JlCiUMJox+j38YOQGVHVEg2kXaTSqURCQc6/ezvItNP9LADhE1ndmg0E1Vv0unS1CDu04JzZdEo4fdD0uSU7xJ9Zf49z4b6V9sOVW6rEKoXzemcyiD8o1rB5hOHD7xfoIUrxni/eutNkMLS43RJo+de/aOImORXxZaQXXpi+t8LAlauS+jvfvYjKIKr6F3mzhkH/Y63autPSFN71T/vab1L7o7aKrjHG8ocHmLAK3t3EQT85WWDDShaLA5CuM7WylPZn591GjECJRtmpVSZCvBfkEs24EjGnUxfSLUI+AtRI80NiN12S3j4/RwjjsrNeClUXaSp6MbXE6kyWsXvYpkMMjLN8bd4wNnwP/NExm+o0NG5ZKIinwwbc5okUwCRppIfKDfTbfZYo3Nt/Xy8IfAL+r8Lwe4n7ZMP5ARpU6c5fnA5wrP1f5LGZUJjyNT6Rd73uNv6pfklopDOmv9wTBf+R+jyndQz8YrkytA4d3VHJkITE7WCe2Zc7W3aUsZFVfKtBthcOzIR7d4pR9An99lIb+0wzvMT+lA+bb+jxXyU3UAgi8bhokITWOamfbMtfYsXUpN3GaaALIhM9Q4yg0Nyg8i6PC7sN2TbyDTEZImrtcm5+R/eyZgiZBC/1sAT/3Nuz7ReN3itQVzBig7aIypxToDHRpbwQk+9KL42OBz3CgkT1RQ0tK2bNcHYciLAaITAMN1xXY6JtVP5mKgZg58ZCQo9MFcHsWZuKYs4PyCZ8ZAi/bpPWObo185/YtXmMxvyyjvwF9pX4yjUBObHeBk3qr5SA5GtYWDnVeV/knZjLoEPAigo7rTH9rkBxkFAx0btYeMfL+s5ejiowhJbqFx+qzXrztm2rJACZRsBTTE2tQtqsh52snSA8SEtIDdghwj5neLJP/hUigFBK6LjlEclPX7kSzegnB6XkbNapVDVcy8uWBIGxeBtm5t0ChQUWDFgMyYwOXnyjTCYEZ4UHISVS0TdwKf8/7db74gu6FAWxYSXrkUdryk3g6CmpRJmnDd8Kocc+n/sDw/6VxKCkB8+2/bAJdiQ+FCJVqHhNljyV/yZ/6uRuOBa/ZXy8QWa8ceD9fQEoSHeF0PHNNe7WvHkuQdcQglSbk+2noA94SbpW1JSOjnUdmrUxh8+Kda016Q9kiVgU1G6DxCt+dSFxegoaWxQlDdKr4GTbU4NnPHnvVOJhNSbGRHWJ7J1QzhaWjxrgWUK6nqbAh67nhjUN+pTUJabDecaOvDdrBJDdLpVuKBNpkm2MCneRx6H5q43TvqdNGRb1hT1cs96Zt+UzWqZ4ZJA/Wq9hwY1QTybxL+GSSmNcIOs/HpHzO8xBEuF6aqLY/rpEmZWE0NGhnRBDiGHZfdNIunNWt3XrvAvh/c9hZ X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Aug 2024 02:12:18.0875 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e68ec2b8-d20a-4806-8042-08dcb6865d05 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7147 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240806_191226_056066_F83E310A X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The symbols __arm_smmu_cmdq_skip_err(), arm_smmu_init_one_queue(), and arm_smmu_cmdq_init() need to be used by the tegra241-cmdqv compilation unit in a following patch. Remove the static and put prototypes in the header. Reviewed-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 ++++++++---------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 9 +++++++++ 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index e664c40b14ae..df1149095860 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -365,8 +365,8 @@ static void arm_smmu_cmdq_build_sync_cmd(u64 *cmd, struct arm_smmu_device *smmu, CMDQ_SYNC_1_MSIADDR_MASK; } -static void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, - struct arm_smmu_cmdq *cmdq) +void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq) { static const char * const cerror_str[] = { [CMDQ_ERR_CERROR_NONE_IDX] = "No error", @@ -3512,12 +3512,10 @@ static struct iommu_dirty_ops arm_smmu_dirty_ops = { }; /* Probing and initialisation functions */ -static int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, - struct arm_smmu_queue *q, - void __iomem *page, - unsigned long prod_off, - unsigned long cons_off, - size_t dwords, const char *name) +int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, + struct arm_smmu_queue *q, void __iomem *page, + unsigned long prod_off, unsigned long cons_off, + size_t dwords, const char *name) { size_t qsz; @@ -3555,8 +3553,8 @@ static int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, return 0; } -static int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, - struct arm_smmu_cmdq *cmdq) +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq) { unsigned int nents = 1 << cmdq->q.llq.max_n_shift; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 6c5739f6b90f..6c5dc2f10a33 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -813,6 +813,15 @@ void arm_smmu_tlb_inv_range_asid(unsigned long iova, size_t size, int asid, int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, unsigned long iova, size_t size); +void __arm_smmu_cmdq_skip_err(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq); +int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, + struct arm_smmu_queue *q, void __iomem *page, + unsigned long prod_off, unsigned long cons_off, + size_t dwords, const char *name); +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq); + #ifdef CONFIG_ARM_SMMU_V3_SVA bool arm_smmu_sva_supported(struct arm_smmu_device *smmu); bool arm_smmu_master_sva_supported(struct arm_smmu_master *master);