From patchwork Thu Apr 24 13:23:10 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiko Stuebner X-Patchwork-Id: 4051301 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0FB649F1F4 for ; Thu, 24 Apr 2014 13:23:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E027320303 for ; Thu, 24 Apr 2014 13:23:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 29E3C20165 for ; Thu, 24 Apr 2014 13:23:13 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WdJah-0005qX-SS; Thu, 24 Apr 2014 13:21:27 +0000 Received: from gloria.sntech.de ([95.129.55.99]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WdJae-0005YA-KT for linux-arm-kernel@lists.infradead.org; Thu, 24 Apr 2014 13:21:25 +0000 Received: from ip545477c2.speed.planet.nl ([84.84.119.194] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1WdJaG-000859-7q; Thu, 24 Apr 2014 15:21:00 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Kukjin Kim Subject: [PATCH v2 2/4] ARM: S3C24XX: trim down debug uart handling Date: Thu, 24 Apr 2014 15:23:10 +0200 Message-ID: <199768557.KA84zMPfE3@phil> User-Agent: KMail/4.11.5 (Linux/3.13-1-amd64; KDE/4.11.3; x86_64; ; ) In-Reply-To: <1856986.kkQFKFg1L2@phil> References: <1856986.kkQFKFg1L2@phil> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140424_062125_005573_169ACC58 X-CRM114-Status: GOOD ( 13.94 ) X-Spam-Score: -0.7 (/) Cc: t.figa@samsung.com, linux-samsung-soc@vger.kernel.org, Russell King , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Using the lowlevel debug uart is a corner case - even more so in a multiplatform environment. So it seems reasonable to simply let the developer set the appropriate uart type for the debugged SoC. Signed-off-by: Heiko Stuebner --- arch/arm/Kconfig.debug | 30 ++++++++++++++ arch/arm/mach-s3c24xx/Kconfig | 28 ------------- arch/arm/mach-s3c24xx/include/mach/debug-macro.S | 52 +----------------------- 3 files changed, 31 insertions(+), 79 deletions(-) diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 4a2fc0b..cb5751f 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -670,6 +670,33 @@ choice The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. + config DEBUG_S3C2410_UART0 + depends on ARCH_S3C24XX + select DEBUG_S3C2410_UART + bool "Use S3C2410/S3C2412 UART 0 for low-level debug" + help + Say Y here if you want the debug print routines to direct + their output to UART 0. The port must have been initialised + by the boot-loader before use. + + config DEBUG_S3C2410_UART1 + depends on ARCH_S3C24XX + select DEBUG_S3C2410_UART + bool "Use S3C2410/S3C2412 UART 1 for low-level debug" + help + Say Y here if you want the debug print routines to direct + their output to UART 1. The port must have been initialised + by the boot-loader before use. + + config DEBUG_S3C2410_UART2 + depends on ARCH_S3C24XX + select DEBUG_S3C2410_UART + bool "Use S3C2410/S3C2412 UART 2 for low-level debug" + help + Say Y here if you want the debug print routines to direct + their output to UART 2. The port must have been initialised + by the boot-loader before use. + config DEBUG_SOCFPGA_UART depends on ARCH_SOCFPGA bool "Use SOCFPGA UART for low-level debug" @@ -921,6 +948,9 @@ endchoice config DEBUG_EXYNOS_UART bool +config DEBUG_S3C2410_UART + bool + config DEBUG_OMAP2PLUS_UART bool depends on ARCH_OMAP2PLUS diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 40cf50b..98d17af 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -26,7 +26,6 @@ config CPU_S3C2410 bool "SAMSUNG S3C2410" default y select CPU_ARM920T - select CPU_LLSERIAL_S3C2410 select S3C2410_CLOCK select S3C2410_DMA if S3C24XX_DMA select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ @@ -39,7 +38,6 @@ config CPU_S3C2410 config CPU_S3C2412 bool "SAMSUNG S3C2412" select CPU_ARM926T - select CPU_LLSERIAL_S3C2440 select S3C2412_DMA if S3C24XX_DMA select S3C2412_PM if PM help @@ -48,7 +46,6 @@ config CPU_S3C2412 config CPU_S3C2416 bool "SAMSUNG S3C2416/S3C2450" select CPU_ARM926T - select CPU_LLSERIAL_S3C2440 select S3C2416_PM if PM select S3C2443_COMMON select S3C2443_DMA if S3C24XX_DMA @@ -59,7 +56,6 @@ config CPU_S3C2416 config CPU_S3C2440 bool "SAMSUNG S3C2440" select CPU_ARM920T - select CPU_LLSERIAL_S3C2440 select S3C2410_CLOCK select S3C2410_PM if PM select S3C2440_DMA if S3C24XX_DMA @@ -69,7 +65,6 @@ config CPU_S3C2440 config CPU_S3C2442 bool "SAMSUNG S3C2442" select CPU_ARM920T - select CPU_LLSERIAL_S3C2440 select S3C2410_CLOCK select S3C2410_DMA if S3C24XX_DMA select S3C2410_PM if PM @@ -84,7 +79,6 @@ config CPU_S3C244X config CPU_S3C2443 bool "SAMSUNG S3C2443" select CPU_ARM920T - select CPU_LLSERIAL_S3C2440 select S3C2443_COMMON select S3C2443_DMA if S3C24XX_DMA select SAMSUNG_CLKSRC @@ -158,28 +152,6 @@ config S3C2410_PM help Power Management code common to S3C2410 and better -# low-level serial option nodes - -config CPU_LLSERIAL_S3C2410_ONLY - bool - default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440 - -config CPU_LLSERIAL_S3C2440_ONLY - bool - default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410 - -config CPU_LLSERIAL_S3C2410 - bool - help - Selected if there is an S3C2410 (or register compatible) serial - low-level implementation needed - -config CPU_LLSERIAL_S3C2440 - bool - help - Selected if there is an S3C2440 (or register compatible) serial - low-level implementation needed - config S3C24XX_PLL bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" depends on ARM_S3C24XX_CPUFREQ diff --git a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S index 2f39737..fbe3e71 100644 --- a/arch/arm/mach-s3c24xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c24xx/include/mach/debug-macro.S @@ -13,11 +13,9 @@ */ #include -#include #include #define S3C2410_UART1_OFF (0x4000) -#define SHIFT_2440TXF (14-9) .macro addruart, rp, rv, tmp ldr \rp, = S3C24XX_PA_UART @@ -28,56 +26,11 @@ #endif .endm - .macro fifo_full_s3c24xx rd, rx - @ check for arm920 vs arm926. currently assume all arm926 - @ devices have an 64 byte FIFO identical to the s3c2440 - mrc p15, 0, \rd, c0, c0 - and \rd, \rd, #0xff0 - teq \rd, #0x260 - beq 1004f - mrc p15, 0, \rd, c1, c0 - tst \rd, #1 - addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) - addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) - bic \rd, \rd, #0xff000 - ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)] - and \rd, \rd, #0x00ff0000 - teq \rd, #0x00440000 @ is it 2440? -1004: - ldr \rd, [\rx, # S3C2410_UFSTAT] - moveq \rd, \rd, lsr #SHIFT_2440TXF - tst \rd, #S3C2410_UFSTAT_TXFULL - .endm - .macro fifo_full_s3c2410 rd, rx ldr \rd, [\rx, # S3C2410_UFSTAT] tst \rd, #S3C2410_UFSTAT_TXFULL .endm -/* fifo level reading */ - - .macro fifo_level_s3c24xx rd, rx - @ check for arm920 vs arm926. currently assume all arm926 - @ devices have an 64 byte FIFO identical to the s3c2440 - mrc p15, 0, \rd, c0, c0 - and \rd, \rd, #0xff0 - teq \rd, #0x260 - beq 10000f - mrc p15, 0, \rd, c1, c0 - tst \rd, #1 - addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) - addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) - bic \rd, \rd, #0xff000 - ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)] - and \rd, \rd, #0x00ff0000 - teq \rd, #0x00440000 @ is it 2440? - -10000: - ldr \rd, [\rx, # S3C2410_UFSTAT] - andne \rd, \rd, #S3C2410_UFSTAT_TXMASK - andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK - .endm - .macro fifo_level_s3c2410 rd, rx ldr \rd, [\rx, # S3C2410_UFSTAT] and \rd, \rd, #S3C2410_UFSTAT_TXMASK @@ -88,12 +41,9 @@ * used variants of these */ -#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY) +#if defined(CONFIG_DEBUG_S3C2410_UART) #define fifo_full fifo_full_s3c2410 #define fifo_level fifo_level_s3c2410 -#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY) -#define fifo_full fifo_full_s3c24xx -#define fifo_level fifo_level_s3c24xx #endif /* include the reset of the code which will do the work */