From patchwork Mon Feb 10 15:22:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 3619231 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EA6CFBF418 for ; Mon, 10 Feb 2014 15:29:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D80F0201CD for ; Mon, 10 Feb 2014 15:29:43 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A61D22012D for ; Mon, 10 Feb 2014 15:29:42 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WCsnO-00055W-QK; Mon, 10 Feb 2014 15:29:19 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WCsi1-0007Za-Ey; Mon, 10 Feb 2014 15:23:45 +0000 Received: from mail-ee0-f50.google.com ([74.125.83.50]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WCshp-0007VM-V9 for linux-arm-kernel@lists.infradead.org; Mon, 10 Feb 2014 15:23:39 +0000 Received: by mail-ee0-f50.google.com with SMTP id d17so3066762eek.9 for ; Mon, 10 Feb 2014 07:23:12 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references:content-type; bh=c9rRbuYUcfeAVzwRNogjFg43xaCsyAZC1Lx8gRQ2pR8=; b=DGLM+dKWLpYbQRv5DKcZy4tzRTzzYzqhJMRhAQQTVip8VUlXx1Kc4wNk+9lrexRYzF bEC0tNAecl1BB8KnHMxDUYxFFsIM53Qvqiu4aWXcQ/iBreH95FtqyoTIhAI60xO6cono gC68igWYF0i+49C95gJTRv+dFqe68TqN+5rt1bELuZQCPwSPYkjyWhIBLwulH6+0k7ra LHFIPv1d0ME5uQm2w2rLNxjvAYDdGHnnkI8vSys7yCGwgUhCQ4NLC7bq6xghvfz8dpic WHpIEPRe2bA1QLMr/m3qAOEwcbgW9BM5+NXpV23QD/RhbSe84hUZEADalJGST4wUMnXF p8Sg== X-Gm-Message-State: ALoCoQngXuJ9xgqXd0QRcaVIhDBSm299uLCrlO6WAVi8iYR5VMko2XCHGHWyD2h2iPsupS/jgKUW X-Received: by 10.14.98.66 with SMTP id u42mr37678733eef.18.1392045792055; Mon, 10 Feb 2014 07:23:12 -0800 (PST) Received: from localhost (nat-63.starnet.cz. [178.255.168.63]) by mx.google.com with ESMTPSA id f45sm55535859eeg.5.2014.02.10.07.23.09 for (version=TLSv1.1 cipher=RC4-SHA bits=128/128); Mon, 10 Feb 2014 07:23:10 -0800 (PST) From: Michal Simek To: linux-arm-kernel@lists.infradead.org, Arnd Bergmann Subject: [RFC PATCH 3/3] ARM: zynq: Use early syscon initialization Date: Mon, 10 Feb 2014 16:22:35 +0100 Message-Id: <19fbad8c4c7d655ef73e0c7dd16a045a02a63286.1392045742.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: References: In-Reply-To: References: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140210_102334_655420_5899783D X-CRM114-Status: GOOD ( 22.79 ) X-Spam-Score: 1.1 (+) Cc: Mark Rutland , Josh Cartwright , monstr@monstr.eu, James Hogan , Russell King , Stephen Warren , Pawel Moll , Ian Campbell , Stephen Boyd , Peter Crosthwaite , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Felipe Pena , Kumar Gala , Mike Turquette , Steffen Trumtrar , Soren Brinkmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,KHOP_BIG_TO_CC, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_TVD_MIME_NO_HEADERS, UNPARSEABLE_RELAY autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use early syscon initialization to simplify slcr code. - Remove two slcr inits (zynq_slcr_init, zynq_early_slcr_init) - Directly use regmap accesses in zynq_slcr_read/write - Remove zynq_clock_init() and use addresses from syscon (This is the most problematic part now because clock doesn't support regmap accesses that's why reading slcr base is ugly. There are some attempts to get clk regmap to work - for example: https://lkml.org/lkml/2013/10/16/112) Signed-off-by: Michal Simek --- Especially look at slcr.c which is much simpler than was before. clkc.c will be simpler when regmap support is added because then syscon_early_regmap_lookup_by_phandle() will be called without zynq_slcr_base search. --- arch/arm/boot/dts/zynq-7000.dtsi | 1 + arch/arm/mach-zynq/common.c | 6 ++--- arch/arm/mach-zynq/slcr.c | 42 ++--------------------------- drivers/clk/zynq/clkc.c | 57 ++++++++++++---------------------------- 4 files changed, 23 insertions(+), 83 deletions(-) -- 1.8.2.3 diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 7284499..e414489 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -135,6 +135,7 @@ compatible = "xlnx,zynq-slcr", "syscon"; reg = <0xF8000000 0x1000>; ranges; + syscon = <&slcr>; clkc: clkc@100 { #clock-cells = <1>; compatible = "xlnx,ps7-clkc"; diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 9d3c88e..78589e3 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -130,15 +131,14 @@ out: of_platform_populate(NULL, of_default_bus_match_table, NULL, parent); platform_device_register(&zynq_cpuidle_device); - - zynq_slcr_init(); } static void __init zynq_timer_init(void) { + early_syscon_init(); + zynq_early_slcr_init(); - zynq_clock_init(); of_clk_init(NULL); clocksource_of_init(); } diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index 594b280..a89b082 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -35,7 +35,6 @@ #define SLCR_PSS_IDCODE_DEVICE_SHIFT 12 #define SLCR_PSS_IDCODE_DEVICE_MASK 0x1F -static void __iomem *zynq_slcr_base; static struct regmap *zynq_slcr_regmap; /** @@ -48,11 +47,6 @@ static struct regmap *zynq_slcr_regmap; */ static int zynq_slcr_write(u32 val, u32 offset) { - if (!zynq_slcr_regmap) { - writel(val, zynq_slcr_base + offset); - return 0; - } - return regmap_write(zynq_slcr_regmap, offset, val); } @@ -66,12 +60,7 @@ static int zynq_slcr_write(u32 val, u32 offset) */ static int zynq_slcr_read(u32 *val, u32 offset) { - if (zynq_slcr_regmap) - return regmap_read(zynq_slcr_regmap, offset, val); - - *val = readl(zynq_slcr_base + offset); - - return 0; + return regmap_read(zynq_slcr_regmap, offset, val); } /** @@ -169,24 +158,6 @@ void zynq_slcr_cpu_stop(int cpu) } /** - * zynq_slcr_init - Regular slcr driver init - * - * Return: 0 on success, negative errno otherwise. - * - * Called early during boot from platform code to remap SLCR area. - */ -int __init zynq_slcr_init(void) -{ - zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr"); - if (IS_ERR(zynq_slcr_regmap)) { - pr_err("%s: failed to find zynq-slcr\n", __func__); - return -ENODEV; - } - - return 0; -} - -/** * zynq_early_slcr_init - Early slcr init function * * Return: 0 on success, negative errno otherwise. @@ -202,20 +173,11 @@ int __init zynq_early_slcr_init(void) pr_err("%s: no slcr node found\n", __func__); BUG(); } - - zynq_slcr_base = of_iomap(np, 0); - if (!zynq_slcr_base) { - pr_err("%s: Unable to map I/O memory\n", __func__); - BUG(); - } - - np->data = (__force void *)zynq_slcr_base; + zynq_slcr_regmap = syscon_early_regmap_lookup_by_phandle(np, "syscon"); /* unlock the SLCR so that registers can be changed */ zynq_slcr_unlock(); - pr_info("%s mapped to %p\n", np->name, zynq_slcr_base); - of_node_put(np); return 0; diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index c812b93..b2fd160 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq/clkc.c @@ -214,6 +214,10 @@ err: clks[clk1] = ERR_PTR(-ENOMEM); } +struct syscon { + void __iomem *base; +}; + static void __init zynq_clk_setup(struct device_node *np) { int i; @@ -227,6 +231,19 @@ static void __init zynq_clk_setup(struct device_node *np) const char *periph_parents[4]; const char *swdt_ext_clk_mux_parents[2]; const char *can_mio_mux_parents[NUM_MIO_PINS]; + struct resource res; + void __iomem *zynq_slcr_base; + + struct device_node *slcr = of_get_parent(np); + struct syscon *syscon = slcr->data; + zynq_slcr_base = syscon->base; + + if (of_address_to_resource(np, 0, &res)) { + pr_err("%s: failed to get resource\n", np->name); + return; + } + + zynq_clkc_base = zynq_slcr_base + res.start; pr_info("Zynq clock init\n"); @@ -569,43 +586,3 @@ static void __init zynq_clk_setup(struct device_node *np) } CLK_OF_DECLARE(zynq_clkc, "xlnx,ps7-clkc", zynq_clk_setup); - -void __init zynq_clock_init(void) -{ - struct device_node *np; - struct device_node *slcr; - struct resource res; - - np = of_find_compatible_node(NULL, NULL, "xlnx,ps7-clkc"); - if (!np) { - pr_err("%s: clkc node not found\n", __func__); - goto np_err; - } - - if (of_address_to_resource(np, 0, &res)) { - pr_err("%s: failed to get resource\n", np->name); - goto np_err; - } - - slcr = of_get_parent(np); - - if (slcr->data) { - zynq_clkc_base = (__force void __iomem *)slcr->data + res.start; - } else { - pr_err("%s: Unable to get I/O memory\n", np->name); - of_node_put(slcr); - goto np_err; - } - - pr_info("%s: clkc starts at %p\n", __func__, zynq_clkc_base); - - of_node_put(slcr); - of_node_put(np); - - return; - -np_err: - of_node_put(np); - BUG(); - return; -}