diff mbox series

pinctrl: sunxi: set minimal debounce on input-debounce 0

Message ID 200d4457-9801-c862-0e86-850e3188f765@flying-snail.de (mailing list archive)
State New, archived
Headers show
Series pinctrl: sunxi: set minimal debounce on input-debounce 0 | expand

Commit Message

Andreas Feldner Feb. 11, 2023, 6:08 p.m. UTC
sunxi-h3-h5 based boards have no support for switching
off IRQ debouncing filter. This would be the expected
behaviour of value 0 for the general pinctl parameter
input-debounce.
The current driver implementation ignores value 0
for input-debounce, leaving the chip's default. This
default, however, is not minimal, but equivalent to
value 31 (microseconds).

This patch does not ignore value 0 but instead makes
sure the corresponding IRQ debounce filter is set
to the shortest time selectable, i. e. the fast
oscillator with a divider of 1 == (2 ^ 0).

The current default behaviour is explicitly ensured
by including input-debounce=<31 31> in the relevant
part of the devicetree.

Fixes: 7c926492d38a ("pinctrl: sunxi: Add support for interrupt debouncing")

Signed-off-by: Andreas Feldner <pelzi@flying-snail.de>
---
  arch/arm/boot/dts/sunxi-h3-h5.dtsi    |  1 +
  drivers/pinctrl/sunxi/pinctrl-sunxi.c | 40 +++++++++++++++------------
  2 files changed, 24 insertions(+), 17 deletions(-)


      return 0;

Comments

Andre Przywara Feb. 11, 2023, 7:59 p.m. UTC | #1
On Sat, 11 Feb 2023 19:08:32 +0100
Andreas Feldner <pelzi@flying-snail.de> wrote:

Hi Andreas,

thanks for putting this together!

> sunxi-h3-h5 based boards have no support for switching
> off IRQ debouncing filter. This would be the expected
> behaviour of value 0 for the general pinctl parameter
> input-debounce.
> The current driver implementation ignores value 0
> for input-debounce, leaving the chip's default. This
> default, however, is not minimal, but equivalent to
> value 31 (microseconds).
> 
> This patch does not ignore value 0 but instead makes
> sure the corresponding IRQ debounce filter is set
> to the shortest time selectable, i. e. the fast
> oscillator with a divider of 1 == (2 ^ 0).
> 
> The current default behaviour is explicitly ensured
> by including input-debounce=<31 31> in the relevant
> part of the devicetree.

The actual change looks alright to me, just some general comments:
- Please don't post new patches as replies to existing threads. Even a
  new revision of a previously posted series is a new thread.
- Your patch is whitespace deformed (no tabs, just spaces). This makes
  it impossible to apply without doing it manually. Your original patch
  was fine in this regard, not sure what you changed. In general it's
  recommended to use git send-email. For a simple patch it might be
  feasible to craft the email in a client (ideally by using an
  external editor), but make sure that it still applies. Sending to
  yourself first helps.
- You cannot mix DT changes and code changes in one patch, they have to
  be in separate patches. The DT change also brings up the question why
  this would be specific to H3/H5, I think this applies to virtually
  every Allwinner SoC.

Cheers,
Andre

> 
> Fixes: 7c926492d38a ("pinctrl: sunxi: Add support for interrupt debouncing")
> 
> Signed-off-by: Andreas Feldner <pelzi@flying-snail.de>
> ---
>   arch/arm/boot/dts/sunxi-h3-h5.dtsi    |  1 +
>   drivers/pinctrl/sunxi/pinctrl-sunxi.c | 40 +++++++++++++++------------
>   2 files changed, 24 insertions(+), 17 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
> b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> index 686193bd6bd9..e9ed4948134d 100644
> --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> @@ -410,6 +410,7 @@ pio: pinctrl@1c20800 {
>               #gpio-cells = <3>;
>               interrupt-controller;
>               #interrupt-cells = <3>;
> +            input-debounce = <31 31>;
> 
>               csi_pins: csi-pins {
>                   pins = "PE0", "PE2", "PE3", "PE4", "PE5",
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c 
> b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> index f35179eceb4e..6798c8f4067e 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
> @@ -1444,29 +1444,35 @@ static int sunxi_pinctrl_setup_debounce(struct 
> sunxi_pinctrl *pctl,
>           if (ret)
>               return ret;
> 
> -        if (!debounce)
> -            continue;
> -
> -        debounce_freq = DIV_ROUND_CLOSEST(USEC_PER_SEC, debounce);
> -        losc_div = sunxi_pinctrl_get_debounce_div(losc,
> -                              debounce_freq,
> -                              &losc_diff);
> -
> -        hosc_div = sunxi_pinctrl_get_debounce_div(hosc,
> -                              debounce_freq,
> -                              &hosc_diff);
> -
> -        if (hosc_diff < losc_diff) {
> -            div = hosc_div;
> -            src = 1;
> +        if (debounce) {
> +            debounce_freq = DIV_ROUND_CLOSEST(USEC_PER_SEC, debounce);
> +            losc_div = sunxi_pinctrl_get_debounce_div(losc,
> +                                  debounce_freq,
> +                                  &losc_diff);
> +
> +            hosc_div = sunxi_pinctrl_get_debounce_div(hosc,
> +                                  debounce_freq,
> +                                  &hosc_diff);
> +
> +            if (hosc_diff < losc_diff) {
> +                div = hosc_div;
> +                src = 1;
> +            } else {
> +                div = losc_div;
> +                src = 0;
> +            }
>           } else {
> -            div = losc_div;
> -            src = 0;
> +            /* lowest time as best approximation to "off" */
> +            div = 0;
> +            src = 1;
>           }
> 
>           writel(src | div << 4,
>                  pctl->membase +
>                  sunxi_irq_debounce_reg_from_bank(pctl->desc, i));
> +
> +        pr_info("Debounce filter for IRQ bank %d configured to %d us 
> (reg %x)\n",
> +            i, debounce, src | div << 4);
>       }
> 
>       return 0;
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 686193bd6bd9..e9ed4948134d 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -410,6 +410,7 @@  pio: pinctrl@1c20800 {
              #gpio-cells = <3>;
              interrupt-controller;
              #interrupt-cells = <3>;
+            input-debounce = <31 31>;

              csi_pins: csi-pins {
                  pins = "PE0", "PE2", "PE3", "PE4", "PE5",
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c 
b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index f35179eceb4e..6798c8f4067e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1444,29 +1444,35 @@  static int sunxi_pinctrl_setup_debounce(struct 
sunxi_pinctrl *pctl,
          if (ret)
              return ret;

-        if (!debounce)
-            continue;
-
-        debounce_freq = DIV_ROUND_CLOSEST(USEC_PER_SEC, debounce);
-        losc_div = sunxi_pinctrl_get_debounce_div(losc,
-                              debounce_freq,
-                              &losc_diff);
-
-        hosc_div = sunxi_pinctrl_get_debounce_div(hosc,
-                              debounce_freq,
-                              &hosc_diff);
-
-        if (hosc_diff < losc_diff) {
-            div = hosc_div;
-            src = 1;
+        if (debounce) {
+            debounce_freq = DIV_ROUND_CLOSEST(USEC_PER_SEC, debounce);
+            losc_div = sunxi_pinctrl_get_debounce_div(losc,
+                                  debounce_freq,
+                                  &losc_diff);
+
+            hosc_div = sunxi_pinctrl_get_debounce_div(hosc,
+                                  debounce_freq,
+                                  &hosc_diff);
+
+            if (hosc_diff < losc_diff) {
+                div = hosc_div;
+                src = 1;
+            } else {
+                div = losc_div;
+                src = 0;
+            }
          } else {
-            div = losc_div;
-            src = 0;
+            /* lowest time as best approximation to "off" */
+            div = 0;
+            src = 1;
          }

          writel(src | div << 4,
                 pctl->membase +
                 sunxi_irq_debounce_reg_from_bank(pctl->desc, i));
+
+        pr_info("Debounce filter for IRQ bank %d configured to %d us 
(reg %x)\n",
+            i, debounce, src | div << 4);
      }