From patchwork Thu Sep 8 14:59:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tip-bot for Dave Martin X-Patchwork-Id: 1129992 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p88F0LZZ014758 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 8 Sep 2011 15:00:43 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R1g5B-0007Ey-Vx; Thu, 08 Sep 2011 15:00:02 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1R1g5B-0006z4-Jv; Thu, 08 Sep 2011 15:00:01 +0000 Received: from mail-wy0-f177.google.com ([74.125.82.177]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1R1g57-0006yk-Ts for linux-arm-kernel@lists.infradead.org; Thu, 08 Sep 2011 14:59:58 +0000 Received: by wyh11 with SMTP id 11so795333wyh.36 for ; Thu, 08 Sep 2011 07:59:55 -0700 (PDT) Received: by 10.216.134.155 with SMTP id s27mr810963wei.98.1315493995202; Thu, 08 Sep 2011 07:59:55 -0700 (PDT) Received: from arm.com (fw-lnat.cambridge.arm.com [217.140.96.63]) by mx.google.com with ESMTPS id fd4sm4476962wbb.21.2011.09.08.07.59.51 (version=SSLv3 cipher=OTHER); Thu, 08 Sep 2011 07:59:52 -0700 (PDT) Date: Thu, 8 Sep 2011 15:59:46 +0100 From: Dave Martin To: Shawn Guo Subject: Re: [PATCH v3] net/smsc911x: add device tree probe support Message-ID: <20110908145946.GE2070@arm.com> References: <1311587040-8988-1-git-send-email-shawn.guo@linaro.org> <1312050360-15767-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1312050360-15767-1-git-send-email-shawn.guo@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110908_105958_140670_E8493C6B X-CRM114-Status: GOOD ( 23.99 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.177 listed in list.dnswl.org] Cc: patches@linaro.org, netdev@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, Grant Likely , Steve Glendinning , "David S. Miller" , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 08 Sep 2011 15:00:43 +0000 (UTC) Hi Shawn, On Sun, Jul 31, 2011 at 02:26:00AM +0800, Shawn Guo wrote: > It adds device tree probe support for smsc911x driver. > > Signed-off-by: Shawn Guo > Cc: Grant Likely > Cc: Steve Glendinning > Cc: David S. Miller > Reviewed-by: Grant Likely > --- > Changes since v2: > * Fix a typo in smsc911x.txt > > Changes since v1: > * Instead of getting irq line from gpio number, it use irq domain > to keep platform_get_resource(IORESOURCE_IRQ) works for dt too. > * Use 'lan9115' the first model that smsc911x supports in the match > table > * Use reg-shift and reg-io-width which already used in of_serial for > shift and access size binding When using this patch with vexpress, I found that 16-bit register access mode doesn't seem to be getting set correctly. Can you take a look at this additional patch and let me know if it looks correct? Cheers ---Dave From: Dave Martin Date: Wed, 7 Sep 2011 17:26:31 +0100 Subject: [PATCH] net/smsc911x: Correctly configure 16-bit register access from DT The SMSC911X_USE_16BIT needs to be set when using 16-bit register access. However, currently no flag is set if the DT doesn't specify 32-bit access. This patch should set the SMSC911X_USE_16BIT flag in a manner consistent with the documented DT bindings. Signed-off-by: Dave Martin --- drivers/net/smsc911x.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c index 75c08a5..1a35c25 100644 --- a/drivers/net/smsc911x.c +++ b/drivers/net/smsc911x.c @@ -2121,6 +2121,8 @@ static int __devinit smsc911x_probe_config_dt( of_property_read_u32(np, "reg-io-width", &width); if (width == 4) config->flags |= SMSC911X_USE_32BIT; + else + config->flags |= SMSC911X_USE_16BIT; if (of_get_property(np, "smsc,irq-active-high", NULL)) config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;