From patchwork Thu Jul 19 14:12:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 1216991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 726683FD48 for ; Thu, 19 Jul 2012 14:19:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SrrSw-0000bS-78; Thu, 19 Jul 2012 14:12:30 +0000 Received: from moutng.kundenserver.de ([212.227.17.10]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SrrSa-0000b4-Qd for linux-arm-kernel@lists.infradead.org; Thu, 19 Jul 2012 14:12:10 +0000 Received: from klappe2.localnet (deibp9eh1--blueice3n2.emea.ibm.com [195.212.29.180]) by mrelayeu.kundenserver.de (node=mrbap3) with ESMTP (Nemesis) id 0LeM6H-1TdafJ347J-00q9M7; Thu, 19 Jul 2012 16:12:05 +0200 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Subject: Re: [GIT PULL] io.h clean-up for PCI Date: Thu, 19 Jul 2012 14:12:00 +0000 User-Agent: KMail/1.12.2 (Linux/3.5.0-rc1+; KDE/4.3.2; x86_64; ; ) References: <50049285.1060100@gmail.com> In-Reply-To: <50049285.1060100@gmail.com> MIME-Version: 1.0 Message-Id: <201207191412.00540.arnd@arndb.de> X-Provags-ID: V02:K0:njIRH9jwiP/OJFtEjM9OSrISRj7/cEggrTaKLTlH81y RVeFMYkjBaL/d5PObjL72O9L5v0shUQqbHBTIfW4cYBRIcqt0z 0bvuFqP1eMXdpwUspohzrSMPDiNDJt4IlieHJjE9m28wpHDiSm nO6kAzuJYC1fTcZu49AJ94ixlOtogOANi/98X7T/Euwvq7zDKh g9UJt45zLQk5721/DEa8GQh+grTbn9wYkz4082VPYyvJqCwCor Vfqv0ag0XhZwg/7WO4DBoIIHR/XCJjnIMlDJyDf7Y4tHNa4RZX uWbNHguY40TxcasoKzvdkKiUuCvnSwQrQlRDYB4Ghrej0OLjTF knd/TaCLcC5FDLKQGi5w= X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.17.10 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Olof Johansson , Nicolas Pitre X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Monday 16 July 2012, Rob Herring wrote: > Arnd, > > Please pull io.h PCI clean-up series. As you suggested, lets get it in > next for test and decide later if to apply it for 3.6 or wait. > > BTW, I'll have sporadic email access over the next 2 weeks. I think we need this one: iop13xx ended up with two conflicting definitions for IOP13XX_PCIE_LOWER_IO_BA, where one of them is used to set up the hardware window and should be zero, while the other one is used to set the location of the second mapping into the virtual address space. This kills the second definition and hardcodes the 64KB offset that is already hardcoded in the bios32.c file now. Signed-off-by: Arnd Bergmann index 9278b8c..cc9e058 100644 --- a/arch/arm/mach-iop13xx/include/mach/iop13xx.h +++ b/arch/arm/mach-iop13xx/include/mach/iop13xx.h @@ -95,7 +95,6 @@ extern unsigned long get_iop_tick_rate(void); /* PCI-E ranges */ #define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL #define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */ -#define IOP13XX_PCIE_LOWER_IO_BA 0x10000UL #define IOP13XX_PCIE_MEM_PHYS_OFFSET 0x200000000ULL #define IOP13XX_PCIE_MEM_WINDOW_SIZE 0x3a000000UL diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index 56a4b41..9cad41b 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -1058,7 +1058,7 @@ int iop13xx_pci_setup(int nr, struct pci_sys_data *sys) __raw_writel(pcsr, IOP13XX_ATUE_PCSR); - pci_ioremap_io(IOP13XX_PCIE_LOWER_IO_BA, IOP13XX_PCIE_LOWER_IO_PA); + pci_ioremap_io(SZ_64K, IOP13XX_PCIE_LOWER_IO_PA); res->start = IOP13XX_PCIE_LOWER_MEM_RA; res->end = IOP13XX_PCIE_UPPER_MEM_RA;