From patchwork Mon Sep 10 19:07:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jamie Iles X-Patchwork-Id: 1433331 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 134954025E for ; Mon, 10 Sep 2012 19:11:34 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TB9KN-0001A0-1o; Mon, 10 Sep 2012 19:07:23 +0000 Received: from mail-ey0-f177.google.com ([209.85.215.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TB9KI-00019m-J5 for linux-arm-kernel@lists.infradead.org; Mon, 10 Sep 2012 19:07:19 +0000 Received: by eaai12 with SMTP id i12so1047605eaa.36 for ; Mon, 10 Sep 2012 12:07:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent :x-gm-message-state; bh=P4xsSa/9BHBOHofHVvLoUKkIviBl36cdC3Pl/sHrGOY=; b=c1t6nGZqlVUlOmwUlxFj08E/oOmld7a+dS6EkzpOPhUorC82Wf8iRFPyN98q6i5wiD c8YedfzNFYhbbTVq8/WSTtRM23OqWwGfj2NXcHvvuWWxib+o56CNm06gJCQaOMoO82Xo n9F35Xxps+gdVm/0gewQkWahkQhk2i6uPDUQpiYdbCa755Zk8ZybBtIB5l8yuKQywxhB JYRSNXWnlp8X6BCKO5j4Mza8oeFZXvSHdbe4/73OgoB9FDjKR4CWpAr9n6piWcJAPav3 40R/ifhOinejLY/TceDflAE8k75w2hV55C+LUsGp3J3itlFhYcH1d7OQfZyI+Av8svWW ecXQ== Received: by 10.14.182.134 with SMTP id o6mr21144473eem.26.1347304035287; Mon, 10 Sep 2012 12:07:15 -0700 (PDT) Received: from localhost (cpc1-chap8-2-0-cust194.aztw.cable.virginmedia.com. [94.169.120.195]) by mx.google.com with ESMTPS id 45sm40576160eed.17.2012.09.10.12.07.12 (version=SSLv3 cipher=OTHER); Mon, 10 Sep 2012 12:07:14 -0700 (PDT) Date: Mon, 10 Sep 2012 20:07:11 +0100 From: Jamie Iles To: Rob Herring Subject: Re: [PATCH v3 00/12] Initial multi-platform support Message-ID: <20120910190711.GA11366@page> References: <1346962375-26163-1-git-send-email-robherring2@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1346962375-26163-1-git-send-email-robherring2@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-Gm-Message-State: ALoCoQntIXNNY97HTbE6UK3Lt7xJpaGimB+AdcwV7EdPW2nRyDmJJoq9pypvtO57e7D8BK+SImnJ X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.177 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Andrew Lunn , Rajeev Kumar , Srinidhi Kasagar , Linus Walleij , Nicolas Ferre , Jamie Iles , Kukjin Kim , Russell King , Pawel Moll , Jean-Christophe Plagniol-Villard , Dinh Nguyen , Jason Cooper , Arnd Bergmann , Stephen Warren , Rob Herring , Shiraz Hashim , Andrew Victor , linux-arm-kernel@lists.infradead.org, Viresh Kumar , Sascha Hauer , Olof Johansson , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi Rob, On Thu, Sep 06, 2012 at 03:12:43PM -0500, Rob Herring wrote: > From: Rob Herring > > This series enables initial ARM multi-platform support for highbank, mvebu, > socfpga, picoxcell, and vexpress. Multi-platform support is dependent on > some DEBUG_LL and dtb build rules restructuring. This series is also > dependent on my gpio clean-up series posted here: > > http://lists.infradead.org/pipermail/linux-arm-kernel/2012-September/118138.html > > New in this version: > - Moved ARCH_MULTIPLATFORM back into choice so converted platforms' > defconfigs work before and after conversion. > - Added mvebu, socfpga and picoxcell DEBUG_LL support. DEBUG_LL should > work for all converted platforms. > - Fixed make dtbs. > - Removed all unused headers (timex.h, uncompress.h) and Makefile.boot > - Add ARCH_MULTIPLATFORM depends for XIP found with randconfig builds > - Split out Vexpress to separate patch as now DT board support is always > enabled. > > This series plus gpio clean-up is available here: > git://sources.calxeda.com/kernel/linux.git multi-plat This all looks great, thanks for your hard work! I needed a small fixup patch (below), feel free to fold it into your patches or whatever you think is best. Acked-by: Jamie Iles 8<--- Subject: [PATCH] ARM: picoxcell: fixup multiplatform breakage. The debug macros had a dependency on mach headers. Break that dependency and restore building. Signed-off-by: Jamie Iles --- arch/arm/include/debug/picoxcell.S | 4 ++-- arch/arm/mach-picoxcell/common.c | 11 ++++++----- arch/arm/mach-picoxcell/picoxcell_soc.h | 25 ------------------------- 3 files changed, 8 insertions(+), 32 deletions(-) delete mode 100644 arch/arm/mach-picoxcell/picoxcell_soc.h diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S index 58d4ee3..7419deb 100644 --- a/arch/arm/include/debug/picoxcell.S +++ b/arch/arm/include/debug/picoxcell.S @@ -9,10 +9,10 @@ * accesses to the 8250. */ #include -#include -#include #define UART_SHIFT 2 +#define PICOXCELL_UART1_BASE 0x80230000 +#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) .macro addruart, rp, rv, tmp ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c index a8b70b5..f6c0849 100644 --- a/arch/arm/mach-picoxcell/common.c +++ b/arch/arm/mach-picoxcell/common.c @@ -20,14 +20,15 @@ #include #include -#include "picoxcell_soc.h" #include "common.h" -#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) +#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) +#define PICOXCELL_PERIPH_BASE 0x80000000 +#define PICOXCELL_PERIPH_LENGTH SZ_4M -#define WDT_CTRL_REG_EN_MASK (1 << 0) -#define WDT_CTRL_REG_OFFS (0x00) -#define WDT_TIMEOUT_REG_OFFS (0x04) +#define WDT_CTRL_REG_EN_MASK (1 << 0) +#define WDT_CTRL_REG_OFFS (0x00) +#define WDT_TIMEOUT_REG_OFFS (0x04) static void __iomem *wdt_regs; /* diff --git a/arch/arm/mach-picoxcell/picoxcell_soc.h b/arch/arm/mach-picoxcell/picoxcell_soc.h deleted file mode 100644 index 5566fc8..0000000 --- a/arch/arm/mach-picoxcell/picoxcell_soc.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2011 Picochip Ltd., Jamie Iles - * - * This file contains the hardware definitions of the picoXcell SoC devices. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __PICOXCELL_SOC_H__ -#define __PICOXCELL_SOC_H__ - -#define PICOXCELL_UART1_BASE 0x80230000 -#define PICOXCELL_PERIPH_BASE 0x80000000 -#define PICOXCELL_PERIPH_LENGTH SZ_4M -#define PICOXCELL_VIC0_BASE 0x80060000 -#define PICOXCELL_VIC1_BASE 0x80064000 - -#endif /* __PICOXCELL_SOC_H__ */