From patchwork Sun Oct 7 01:53:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Domenico Andreoli X-Patchwork-Id: 1560241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id A72933FD56 for ; Sun, 7 Oct 2012 01:56:54 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TKg59-0007o4-K3; Sun, 07 Oct 2012 01:55:03 +0000 Received: from mail-wi0-f171.google.com ([209.85.212.171]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TKg4L-0007ek-VA for linux-arm-kernel@lists.infradead.org; Sun, 07 Oct 2012 01:54:18 +0000 Received: by mail-wi0-f171.google.com with SMTP id hj13so1767678wib.0 for ; Sat, 06 Oct 2012 18:54:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:message-id:user-agent:date:from:to:cc:subject:references :content-disposition; bh=7xVnm8J/feh1Hub1/lgBQyXX/B9Au3AQu40vqNcJQEI=; b=psI+3yfPh6Srj3D+TAA7TGpCesWyLDwm8E0QJwdhjh2LklbhWDDOn+5maEO5bBS25n Ij0d7N4JQNf5knBbMfDMws1hp0foATzHcWvFmiVHcX5E4DIDZnYrXHPeNh4nxjO1H9BJ PURhSheEES+B8G7VS9Vm7bKxbtY3eYvj8xbAnV+a2AqGN+U4IWnRJqN3CaUMxxg1WK3l AIZxNMj3opZ8oOufLAcL/FAA6+G/7osTue0LM69nO6BtWmI1wLY51uBTiIyWZRzZXBIg eSTsLzA3BwxxeMCyTeVrr0JSeiSmNI/3J8EuSbMPapyoNLWlMKe8WD0rK8TvUKVj226x q7HA== Received: by 10.180.93.8 with SMTP id cq8mr12054927wib.16.1349574849374; Sat, 06 Oct 2012 18:54:09 -0700 (PDT) Received: from raptus.dandreoli.com (178-85-163-250.dynamic.upc.nl. [178.85.163.250]) by mx.google.com with ESMTPS id bn7sm12738561wib.8.2012.10.06.18.54.07 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 06 Oct 2012 18:54:08 -0700 (PDT) Received: by raptus.dandreoli.com (Postfix, from userid 1000) id 1BBA039120; Sun, 7 Oct 2012 03:54:07 +0200 (CEST) Message-Id: <20121007015406.809888002@gmail.com> User-Agent: quilt/0.60-1 Date: Sun, 07 Oct 2012 03:53:03 +0200 From: Domenico Andreoli To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/6] ARM: bcm476x: Add sched clock References: <20121007015300.828366635@gmail.com> Content-Disposition: inline; filename=arm-bcm476x-add-sched-clock.patch X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.171 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (cavokz[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Domenico Andreoli , devicetree-discuss@lists.ozlabs.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Domenico Andreoli Sched clock implementation based on the BCM476x's free runner counter. Signed-off-by: Domenico Andreoli --- Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt | 18 +++ arch/arm/boot/dts/bcm476x.dtsi | 6 + drivers/clocksource/bcm476x_timer.c | 52 ++++++++++ 3 files changed, 76 insertions(+) Index: b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt =================================================================== --- /dev/null +++ b/Documentation/devicetree/bindings/timer/brcm,bcm476x-sched-clock.txt @@ -0,0 +1,18 @@ +BCM476x Sched clock + +The BCM476x provides a 63-bit free running counter driven by a separate +32KHz clock line. + +Required properties: + +- compatible : should be "brcm,bcm476x-sched-clock" +- reg : Specifies base physical address and size of the registers. +- clock-frequency : The frequency of the clock that drives the counter, in Hz. + +Example: + +sched-clock { + compatible = "brcm,bcm476x-sched-clock"; + reg = <0xbc000 0x1000>; + clock-frequency = <32000>; +}; Index: b/drivers/clocksource/bcm476x_timer.c =================================================================== --- a/drivers/clocksource/bcm476x_timer.c +++ b/drivers/clocksource/bcm476x_timer.c @@ -54,6 +54,21 @@ struct bcm476x_timer { struct irqaction act; }; +static void __iomem *system_clock __read_mostly; + +static u32 notrace bcm476x_sched_read(void) +{ + u32 hi, lo; + + /* access to the counter must happen in the lo-hi order even if + * only the lower 32-bit part is of interest + */ + lo = readl(system_clock); + hi = readl(system_clock + 4); + + return lo; +} + static inline void __iomem *to_load(struct bcm476x_timer *timer) { return timer->base + TIMER_LOAD_OFFSET; @@ -131,6 +146,42 @@ static irqreturn_t bcm476x_timer_interru return IRQ_HANDLED; } +static struct of_device_id bcm476x_sched_clock_match[] __initconst = { + { .compatible = "brcm,bcm476x-sched-clock" }, + {} +}; + +static void __init bcm476x_sched_clock_init(void) +{ + struct device_node *node; + void __iomem *base; + u32 freq; + + node = of_find_matching_node(NULL, bcm476x_sched_clock_match); + if (!node) { + pr_info("No bcm476x sched clock node"); + return; + } + + base = of_iomap(node, 0); + if (!base) { + pr_err("Can't remap sched clock registers"); + return; + } + + if (of_property_read_u32(node, "clock-frequency", &freq)) { + pr_err("Can't read sched clock frequency"); + return; + } + if (freq != 32000) { + pr_err("Invalid sched clock frequency"); + return; + } + + system_clock = base; + setup_sched_clock(bcm476x_sched_read, 32, freq); +} + static struct of_device_id bcm476x_timer_match[] __initconst = { { .compatible = "brcm,bcm476x-system-timer" }, {} @@ -180,6 +231,7 @@ static void __init bcm476x_timer_init(vo if (setup_irq(irq, &timer->act)) panic("Can't set up timer IRQ\n"); + bcm476x_sched_clock_init(); clockevents_config_and_register(&timer->evt, freq, 0xf, 0xffffffff); } Index: b/arch/arm/boot/dts/bcm476x.dtsi =================================================================== --- a/arch/arm/boot/dts/bcm476x.dtsi +++ b/arch/arm/boot/dts/bcm476x.dtsi @@ -22,6 +22,12 @@ clock-frequency = <24000000>; }; + sched-clock { + compatible = "brcm,bcm476x-sched-clock"; + reg = <0xbc000 0x1000>; + clock-frequency = <32000>; + }; + vic0: interrupt-controller@80000 { compatible = "brcm,bcm476x-pl192", "arm,pl192-vic", "arm,primecell"; reg = <0x80000 0x1000>;