From patchwork Mon Oct 8 17:10:11 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 1566451 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 11B1E3FC1A for ; Mon, 8 Oct 2012 17:13:18 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TLGr5-0005t2-EA; Mon, 08 Oct 2012 17:10:59 +0000 Received: from [2002:4e20:1eda::1] (helo=caramon.arm.linux.org.uk) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1TLGr1-0005so-J6 for linux-arm-kernel@lists.infradead.org; Mon, 08 Oct 2012 17:10:56 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Sender:In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=HCtrGBb2OYW2lG/FXvLV+cKD5YyG8nKaoC66CDG7rHQ=; b=BXtovXIExzGdMbm9e/aRwPMlxueCgkKA66fVMqMrxEuH28+75J/jeT9286oawssI9c5+NE3FL6vd4FqWyzoeljwxsgbxp3URnNlqvZW4Gm7iGMJMVPi5QD4V+rfyrB5XubCalN1bQeMpQCj8Yy5xjRqX6lWxofcflodFhebRf9o=; Received: from n2100.arm.linux.org.uk ([2002:4e20:1eda:1:214:fdff:fe10:4f86]:58267) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.76) (envelope-from ) id 1TLGqL-0001UM-Oj; Mon, 08 Oct 2012 18:10:14 +0100 Received: from linux by n2100.arm.linux.org.uk with local (Exim 4.76) (envelope-from ) id 1TLGqK-0007Ix-6K; Mon, 08 Oct 2012 18:10:12 +0100 Date: Mon, 8 Oct 2012 18:10:11 +0100 From: Russell King - ARM Linux To: Michael Olbrich Subject: Re: Problem with 64-bit registers on i.MX53 Message-ID: <20121008171011.GA4625@n2100.arm.linux.org.uk> References: <20121008160841.GM19651@pengutronix.de> <20121008170124.GZ4625@n2100.arm.linux.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20121008170124.GZ4625@n2100.arm.linux.org.uk> User-Agent: Mutt/1.5.19 (2009-01-05) X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.2 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.8 RDNS_NONE Delivered to internal network by a host with no rDNS Cc: linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Mon, Oct 08, 2012 at 06:01:24PM +0100, Russell King - ARM Linux wrote: > On Mon, Oct 08, 2012 at 06:08:41PM +0200, Michael Olbrich wrote: > > > > Hi, > > > > I have a problem that looks like that 64-bit registers (I think) are not > > saved/restored correctly on a context switch. I've reduced it to the > > following test case: > > > > - Latest Linux mainline kernel (v3.6-8559-ge9eca4d) > > v3.5 is also affected > > - imx_v6_v7_defconfig > > - arch/arm/boot/dts/imx53-evk.dts > > > > The following test program is compiled with "-mcpu=cortex-a8 -mfpu=neon > > -O2". > > ------------------------>8-------------------------------- > > #include > > #include > > > > volatile int x = 2; > > volatile int64_t y = 2; > > > > int main() { > > volatile int a = 0; > > volatile int64_t b = 0; > > while (1) { > > a = (a + x) % (1 << 30); > > b = (b + y) % (1 << 30); > > assert(a == b); > > } > > } > > ------------------------>8-------------------------------- > > The ".. (b + y) .." should result in "vadd.i64 d19, d18, d16" or > > something like that. > > Hmm. > > Can you send me the output of 'grep ^Features /proc/cpuinfo' please? You may also like to try the patch below... it will probably fix your problem. Tested-By: Michael Olbrich diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h index a7aadbd..6a6f1e4 100644 --- a/arch/arm/include/asm/vfpmacros.h +++ b/arch/arm/include/asm/vfpmacros.h @@ -28,7 +28,7 @@ ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] tst \tmp, #HWCAP_VFPv3D16 - ldceq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} + ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} addne \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 @@ -52,7 +52,7 @@ ldr \tmp, =elf_hwcap @ may not have MVFR regs ldr \tmp, [\tmp, #0] tst \tmp, #HWCAP_VFPv3D16 - stceq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} + stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} addne \base, \base, #32*4 @ step over unused register space #else VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0