diff mbox

[v2,2/5] ARM: gic: remove direct use of gic_raise_softirq

Message ID 20121102124433.GA28213@bnru03 (mailing list archive)
State New, archived
Headers show

Commit Message

srinidhi kasagar Nov. 2, 2012, 12:44 p.m. UTC
Rob,

On Wed, Oct 31, 2012 at 15:58:34 +0100, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
> 
> In preparation of moving gic code to drivers/irqchip, remove the direct
> platform dependencies on gic_raise_softirq. Move the setup of
> smp_cross_call into the gic code. Now that all platforms are using IPI#0
> for core wakeup, create a common wakeup ipi function.
> 
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Rob Herring <rob.herring@calxeda.com>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Tony Lindgren <tony@atomide.com>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Magnus Damm <magnus.damm@gmail.com>
> Cc: Viresh Kumar <viresh.linux@gmail.com>
> Cc: Shiraz Hashim <shiraz.hashim@st.com>
> Cc: Stephen Warren <swarren@wwwdotorg.org>
> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> ---

[...]

>  static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
> diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
> index 3db7782..774e527 100644
> --- a/arch/arm/mach-ux500/platsmp.c
> +++ b/arch/arm/mach-ux500/platsmp.c
> @@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void)
> 
>         for (i = 0; i < ncores; i++)
>                 set_cpu_possible(i, true);
> -
> -       set_smp_cross_call(gic_raise_softirq);

The ux500 changes looks ok too..

However would you mind re-spinning your series on top of the below patch?

From 6a574702ad6c45819c182a2c2bbd70d3ba7a859f Mon Sep 17 00:00:00 2001
From: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Date: Fri, 2 Nov 2012 12:45:40 +0530
Subject: [PATCH] ARM : mach-ux500: use SGI0 to wake up the other core

The commit 7d28e3eaa1a8e951251b942e7220f97114bd73b9
("ARM: ux500: wake secondary cpu via resched") makes use
of schedule IPI to wake up the secondary core which seems
incorrect. Rather use SGI0.

Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
---
 arch/arm/mach-ux500/platsmp.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

srinidhi kasagar Nov. 19, 2012, 11:50 a.m. UTC | #1
On Fri, Nov 02, 2012 at 13:44:33 +0100, Srinidhi Kasagar wrote:
> Rob,
> 
> On Wed, Oct 31, 2012 at 15:58:34 +0100, Rob Herring wrote:
> > From: Rob Herring <rob.herring@calxeda.com>
> > 
> > In preparation of moving gic code to drivers/irqchip, remove the direct
> > platform dependencies on gic_raise_softirq. Move the setup of
> > smp_cross_call into the gic code. Now that all platforms are using IPI#0
> > for core wakeup, create a common wakeup ipi function.

[...]


> > 
> >         for (i = 0; i < ncores; i++)
> >                 set_cpu_possible(i, true);
> > -
> > -       set_smp_cross_call(gic_raise_softirq);
> 
> The ux500 changes looks ok too..
> 
> However would you mind re-spinning your series on top of the below patch?

ping??

> 
> From 6a574702ad6c45819c182a2c2bbd70d3ba7a859f Mon Sep 17 00:00:00 2001
> From: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
> Date: Fri, 2 Nov 2012 12:45:40 +0530
> Subject: [PATCH] ARM : mach-ux500: use SGI0 to wake up the other core
> 
> The commit 7d28e3eaa1a8e951251b942e7220f97114bd73b9
> ("ARM: ux500: wake secondary cpu via resched") makes use
> of schedule IPI to wake up the secondary core which seems
> incorrect. Rather use SGI0.
> 
> Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
> ---
>  arch/arm/mach-ux500/platsmp.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
> index da1d5ad..3f996f2 100644
> --- a/arch/arm/mach-ux500/platsmp.c
> +++ b/arch/arm/mach-ux500/platsmp.c
> @@ -97,7 +97,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
>  	 */
>  	write_pen_release(cpu_logical_map(cpu));
>  
> -	smp_send_reschedule(cpu);
> +	gic_raise_softirq(cpumask_of(cpu), 0);
>  
>  	timeout = jiffies + (1 * HZ);
>  	while (time_before(jiffies, timeout)) {
> --
Thomas Petazzoni Nov. 19, 2012, 12:07 p.m. UTC | #2
On Mon, 19 Nov 2012 17:20:22 +0530, Srinidhi Kasagar wrote:
> > >         for (i = 0; i < ncores; i++)
> > >                 set_cpu_possible(i, true);
> > > -
> > > -       set_smp_cross_call(gic_raise_softirq);
> > 
> > The ux500 changes looks ok too..
> > 
> > However would you mind re-spinning your series on top of the below patch?
> 
> ping??

I have merged Linus Walleij patches into my irqchip branch with more
changes around the irqchip infrastructure. That said, it will not be
part of the 3.8 release cycle, so we will definitely take care of
re-spinning against the latest ux500 changes.

Thanks!

Thomas
Rob Herring Nov. 19, 2012, 1:52 p.m. UTC | #3
On 11/19/2012 06:07 AM, Thomas Petazzoni wrote:
> 
> On Mon, 19 Nov 2012 17:20:22 +0530, Srinidhi Kasagar wrote:
>>>>         for (i = 0; i < ncores; i++)
>>>>                 set_cpu_possible(i, true);
>>>> -
>>>> -       set_smp_cross_call(gic_raise_softirq);
>>>
>>> The ux500 changes looks ok too..
>>>
>>> However would you mind re-spinning your series on top of the below patch?
>>
>> ping??
> 
> I have merged Linus Walleij patches into my irqchip branch with more
> changes around the irqchip infrastructure. That said, it will not be
> part of the 3.8 release cycle, so we will definitely take care of
> re-spinning against the latest ux500 changes.

I still hope to get some of the clean-up in for 3.8 if not the move
itself. So I can include your patch. Is it in an arm-soc branch already?

Rob
Linus Walleij Nov. 19, 2012, 1:56 p.m. UTC | #4
On Mon, Nov 19, 2012 at 2:52 PM, Rob Herring <robherring2@gmail.com> wrote:

>> I have merged Linus Walleij patches into my irqchip branch with more
>> changes around the irqchip infrastructure. That said, it will not be
>> part of the 3.8 release cycle, so we will definitely take care of
>> re-spinning against the latest ux500 changes.
>
> I still hope to get some of the clean-up in for 3.8 if not the move
> itself. So I can include your patch. Is it in an arm-soc branch already?

Please include this patch, I haven't seen it in ARM SoC, and
I sure think Srinidhi's intention was to take it together with
these patches.

Yours,
Linus Walleij
Thomas Petazzoni Nov. 19, 2012, 2:03 p.m. UTC | #5
Rob,

On Mon, 19 Nov 2012 07:52:36 -0600, Rob Herring wrote:

> > I have merged Linus Walleij patches into my irqchip branch with more
> > changes around the irqchip infrastructure. That said, it will not be
> > part of the 3.8 release cycle, so we will definitely take care of
> > re-spinning against the latest ux500 changes.
> 
> I still hope to get some of the clean-up in for 3.8 if not the move
> itself. So I can include your patch. Is it in an arm-soc branch already?

No, not yet. My goal was to send soon a new RFC version of the patches.
In case you want to have a look, here is what I have for now:

 https://github.com/MISL-EBU-System-SW/mainline-public/commits/irqchip-improvements

Or the irqchip-improvements branch at
git@github.com:MISL-EBU-System-SW/mainline-public.git.

This is a heavily work-in-progress branch. Compared to the previous
version, the most significant changes are:

 * Integration of your GIC/VIC patches.

 * Usage of a linker script trick to accumulate the available irqchip
   drivers in order to avoid the global list in irqchip.{c,h} which
   would otherwise become a conflict nightmare.

 * More VIC cleanup patches so that vic_of_init() doesn't need to be
   exposed anymore.

 * Implementation of Arnd's idea of set_handle_irq() in the core ARM
   code.

Remains to be done:

 * Testing.

 * Validate that the linker script solution is acceptable.

 * Integrate Linus Walleij patches moving the FPGA irq controller code
   to drivers/irqchip/.

 * Solve Russell's comment about the header file location.

I'm hoping to make some progress on this either tomorrow or the day
after, but I think it's mostly 3.9 material at this point as we have
quite a few remaining problems to solve (the header file location for
gic and vic being the most important ones I'd say).

Best regards,

Thomas
diff mbox

Patch

diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index da1d5ad..3f996f2 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -97,7 +97,7 @@  int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	 */
 	write_pen_release(cpu_logical_map(cpu));
 
-	smp_send_reschedule(cpu);
+	gic_raise_softirq(cpumask_of(cpu), 0);
 
 	timeout = jiffies + (1 * HZ);
 	while (time_before(jiffies, timeout)) {