From patchwork Fri Nov 2 12:44:34 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: srinidhi kasagar X-Patchwork-Id: 1688561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 9D077DF2A2 for ; Fri, 2 Nov 2012 12:50:36 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TUGfu-0006FY-Qc; Fri, 02 Nov 2012 12:48:39 +0000 Received: from eu1sys200aog109.obsmtp.com ([207.126.144.127]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1TUGfq-0006F6-87 for linux-arm-kernel@lists.infradead.org; Fri, 02 Nov 2012 12:48:35 +0000 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob109.postini.com ([207.126.147.11]) with SMTP ID DSNKUJPAiUFQuoB/o6jKR+BeBpvIR+Eev3jX@postini.com; Fri, 02 Nov 2012 12:48:34 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 826D82EE; Fri, 2 Nov 2012 12:44:38 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 7C5F425A4; Fri, 2 Nov 2012 12:44:37 +0000 (GMT) Received: from exdcvycastm022.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm022", Issuer "exdcvycastm022" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id C47BC24C07C; Fri, 2 Nov 2012 13:44:30 +0100 (CET) Received: from localhost (10.201.54.120) by exdcvycastm022.EQ1STM.local (10.230.100.30) with Microsoft SMTP Server (TLS) id 8.3.83.0; Fri, 2 Nov 2012 13:44:36 +0100 Date: Fri, 2 Nov 2012 18:14:34 +0530 From: Srinidhi Kasagar To: Rob Herring Subject: Re: [PATCH v2 2/5] ARM: gic: remove direct use of gic_raise_softirq Message-ID: <20121102124433.GA28213@bnru03> References: <1351695517-5636-1-git-send-email-robherring2@gmail.com> <1351695517-5636-3-git-send-email-robherring2@gmail.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1351695517-5636-3-git-send-email-robherring2@gmail.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20121102_084834_548710_96674B43 X-CRM114-Status: GOOD ( 27.29 ) X-Spam-Score: -1.2 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.126.144.127 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Tony Lindgren , "catalin.marinas@arm.com" , Linus Walleij , Daniel Walker , Kukjin Kim , Russell King , jonas.aberg@stericsson.com, Magnus Damm , David Brown , Arnd Bergmann , Stephen Warren , Rob Herring , rickard.andersson@stericsson.com, Shiraz HASHIM , Thomas Gleixner , "linux-arm-kernel@lists.infradead.org" , Thomas Petazzoni , Bryan Huntsman , Paul Mundt , Viresh Kumar , Sascha Hauer , Olof Johansson X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Rob, On Wed, Oct 31, 2012 at 15:58:34 +0100, Rob Herring wrote: > From: Rob Herring > > In preparation of moving gic code to drivers/irqchip, remove the direct > platform dependencies on gic_raise_softirq. Move the setup of > smp_cross_call into the gic code. Now that all platforms are using IPI#0 > for core wakeup, create a common wakeup ipi function. > > Signed-off-by: Rob Herring > Cc: Russell King > Cc: Kukjin Kim > Cc: Rob Herring > Cc: Sascha Hauer > Cc: David Brown > Cc: Daniel Walker > Cc: Bryan Huntsman > Cc: Tony Lindgren > Cc: Paul Mundt > Cc: Magnus Damm > Cc: Viresh Kumar > Cc: Shiraz Hashim > Cc: Stephen Warren > Cc: Srinidhi Kasagar > Cc: Linus Walleij > --- [...] > static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) > diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c > index 3db7782..774e527 100644 > --- a/arch/arm/mach-ux500/platsmp.c > +++ b/arch/arm/mach-ux500/platsmp.c > @@ -155,8 +155,6 @@ static void __init ux500_smp_init_cpus(void) > > for (i = 0; i < ncores; i++) > set_cpu_possible(i, true); > - > - set_smp_cross_call(gic_raise_softirq); The ux500 changes looks ok too.. However would you mind re-spinning your series on top of the below patch? From 6a574702ad6c45819c182a2c2bbd70d3ba7a859f Mon Sep 17 00:00:00 2001 From: srinidhi kasagar Date: Fri, 2 Nov 2012 12:45:40 +0530 Subject: [PATCH] ARM : mach-ux500: use SGI0 to wake up the other core The commit 7d28e3eaa1a8e951251b942e7220f97114bd73b9 ("ARM: ux500: wake secondary cpu via resched") makes use of schedule IPI to wake up the secondary core which seems incorrect. Rather use SGI0. Signed-off-by: srinidhi kasagar --- arch/arm/mach-ux500/platsmp.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index da1d5ad..3f996f2 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -97,7 +97,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) */ write_pen_release(cpu_logical_map(cpu)); - smp_send_reschedule(cpu); + gic_raise_softirq(cpumask_of(cpu), 0); timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) {