@@ -98,6 +98,8 @@ static int omap2_enter_full_retention(void)
omap2_gpio_prepare_for_idle(0);
+ pwrdm_pre_transition(NULL);
+
/* One last check for pending IRQs to avoid extra latency due
* to sleeping unnecessarily. */
if (omap_irq_pending())
@@ -109,6 +111,8 @@ static int omap2_enter_full_retention(void)
OMAP_SDRC_REGADDR(SDRC_POWER));
no_sleep:
+ pwrdm_post_transition(NULL);
+
omap2_gpio_resume_after_idle();
clk_enable(osc_ck);
@@ -191,8 +195,12 @@ static void omap2_enter_mpu_retention(void)
WARN_ON(pwrdm_set_next_fpwrst(mpu_pwrdm, PWRDM_FUNC_PWRST_ON));
}
+ pwrdm_pre_transition(mpu_pwrdm);
+
omap2_sram_idle();
+ pwrdm_post_transition(mpu_pwrdm);
+
WARN_ON(pwrdm_set_next_fpwrst(mpu_pwrdm, PWRDM_FUNC_PWRST_ON));
}
The OMAP2xxx PM code was missing calls to pwrdm_pre_transition() and pwrdm_post_transition(). This prevented the power state debugging from working correctly, and also violated some assumptions that are used in future power state caching patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> --- arch/arm/mach-omap2/pm24xx.c | 8 ++++++++ 1 file changed, 8 insertions(+)