From patchwork Wed Feb 13 13:47:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2136201 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 16E4C3FCA4 for ; Wed, 13 Feb 2013 13:46:00 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U5car-0007Si-8d; Wed, 13 Feb 2013 13:41:49 +0000 Received: from mail-da0-f51.google.com ([209.85.210.51]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U5cab-0007On-BZ for linux-arm-kernel@lists.infradead.org; Wed, 13 Feb 2013 13:41:36 +0000 Received: by mail-da0-f51.google.com with SMTP id n15so556931dad.38 for ; Wed, 13 Feb 2013 05:41:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:date:message-id:in-reply-to:references :subject; bh=D/Md94VL+YBOFv/SR8OsjlHb2AoyWFF6xWAp8t06rIY=; b=l7f4k700CMwZVC4I6+9p6NPrvbGW8o76OcAMpFN0BH+hyTOQBVXnZoZ4OXRJobJN9D y1GLhur5xwjEXr401BalWz+PsZR5ubEadboTvzX6iz4s1mzhElIODMrh0iHvHO7O5vhI bNLfonursPEO3ZhQllNVQDu+uJnuqjg6gb2UkxKAtHI3QSr5NRYsmjeD1hRMCuyrc2Mm rpC4qDZ2I+c2TKP1Imou+4IvYb4hRf7QhvQTDzyTXauTQv6Z+647Zixc1dKDS3tYNZHB O1s8QSEXNKcqP2wjoMZ6bpn1gPwiUOOOXLr0/XazTLDMw/J7wwWKuCDSa6H0dER/XPiw Tqiw== X-Received: by 10.66.88.133 with SMTP id bg5mr43317111pab.21.1360762892251; Wed, 13 Feb 2013 05:41:32 -0800 (PST) Received: from [127.0.0.1] (FL1-122-133-79-190.tky.mesh.ad.jp. [122.133.79.190]) by mx.google.com with ESMTPS id c3sm39963949pax.9.2013.02.13.05.41.29 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 13 Feb 2013 05:41:31 -0800 (PST) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Wed, 13 Feb 2013 22:47:07 +0900 Message-Id: <20130213134707.12153.67490.sendpatchset@w520> In-Reply-To: <20130213134628.12153.47120.sendpatchset@w520> References: <20130213134628.12153.47120.sendpatchset@w520> Subject: [PATCH 04/06] ARM: shmobile: Move headsmp-sh73a0.S to headsmp-scu.S X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130213_084133_613783_25D23AC7 X-CRM114-Status: GOOD ( 17.63 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.51 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (magnus.damm[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: horms@verge.net.au, Magnus Damm , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Magnus Damm Rename headsmp-sh73a0.S into headsmp-scu.S and introduce shmobile_secondary_vector_scu(). The goal is to be able to share the function above between all mach-shmobile SoCs that use SCU for SMP. So far only sh73a0 use this. At this time the SCU base address is still hard coded in headsmp-scu.S to 0xf0000000, but this will be changed in the future. Signed-off-by: Magnus Damm --- Hum, perhaps git can generate a better patch with "rename" information? arch/arm/mach-shmobile/Makefile | 2 - arch/arm/mach-shmobile/headsmp-scu.S | 50 ++++++++++++++++++++++++++ arch/arm/mach-shmobile/headsmp-sh73a0.S | 50 -------------------------- arch/arm/mach-shmobile/include/mach/common.h | 2 - arch/arm/mach-shmobile/smp-sh73a0.c | 4 +- 5 files changed, 54 insertions(+), 54 deletions(-) --- 0001/arch/arm/mach-shmobile/Makefile +++ work/arch/arm/mach-shmobile/Makefile 2013-02-05 18:23:20.000000000 +0900 @@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2. # SMP objects smp-y := platsmp.o headsmp.o smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o -smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-sh73a0.o +smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o --- /dev/null +++ work/arch/arm/mach-shmobile/headsmp-scu.S 2013-02-05 18:23:21.000000000 +0900 @@ -0,0 +1,50 @@ +/* + * Shared SCU setup for mach-shmobile + * + * Copyright (C) 2012 Bastian Hecht + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + + __CPUINIT +/* + * Reset vector for secondary CPUs. + * + * First we turn on L1 cache coherency for our CPU. Then we jump to + * shmobile_invalidate_start that invalidates the cache and hands over control + * to the common ARM startup code. + * This function will be mapped to address 0 by the SBAR register. + * A normal branch is out of range here so we need a long jump. We jump to + * the physical address as the MMU is still turned off. + */ + .align 12 +ENTRY(shmobile_secondary_vector_scu) + mrc p15, 0, r0, c0, c0, 5 @ read MIPDR + and r0, r0, #3 @ mask out cpu ID + lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits + mov r1, #0xf0000000 @ SCU base address + ldr r2, [r1, #8] @ SCU Power Status Register + mov r3, #3 + bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode) + str r2, [r1, #8] @ write back + + ldr pc, 1f +1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET +ENDPROC(shmobile_secondary_vector_scu) --- 0001/arch/arm/mach-shmobile/headsmp-sh73a0.S +++ /dev/null 2013-01-21 13:48:16.387453344 +0900 @@ -1,50 +0,0 @@ -/* - * SMP support for SoC sh73a0 - * - * Copyright (C) 2012 Bastian Hecht - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - - __CPUINIT -/* - * Reset vector for secondary CPUs. - * - * First we turn on L1 cache coherency for our CPU. Then we jump to - * shmobile_invalidate_start that invalidates the cache and hands over control - * to the common ARM startup code. - * This function will be mapped to address 0 by the SBAR register. - * A normal branch is out of range here so we need a long jump. We jump to - * the physical address as the MMU is still turned off. - */ - .align 12 -ENTRY(sh73a0_secondary_vector) - mrc p15, 0, r0, c0, c0, 5 @ read MIPDR - and r0, r0, #3 @ mask out cpu ID - lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits - mov r1, #0xf0000000 @ SCU base address - ldr r2, [r1, #8] @ SCU Power Status Register - mov r3, #3 - bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode) - str r2, [r1, #8] @ write back - - ldr pc, 1f -1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET -ENDPROC(sh73a0_secondary_vector) --- 0001/arch/arm/mach-shmobile/include/mach/common.h +++ work/arch/arm/mach-shmobile/include/mach/common.h 2013-02-05 18:29:43.000000000 +0900 @@ -8,6 +8,7 @@ extern void shmobile_setup_delay(unsigne struct twd_local_timer; extern void shmobile_setup_console(void); extern void shmobile_secondary_vector(void); +extern void shmobile_secondary_vector_scu(void); struct clk; extern int shmobile_clk_init(void); extern void shmobile_handle_irq_intc(struct pt_regs *); @@ -45,7 +46,6 @@ extern void sh73a0_add_standard_devices_ extern void sh73a0_clock_init(void); extern void sh73a0_pinmux_init(void); extern void sh73a0_pm_init(void); -extern void sh73a0_secondary_vector(void); extern struct clk sh73a0_extal1_clk; extern struct clk sh73a0_extal2_clk; extern struct clk sh73a0_extcki_clk; --- 0001/arch/arm/mach-shmobile/smp-sh73a0.c +++ work/arch/arm/mach-shmobile/smp-sh73a0.c 2013-02-05 18:23:20.000000000 +0900 @@ -80,9 +80,9 @@ static void __init sh73a0_smp_prepare_cp { scu_enable(scu_base_addr()); - /* Map the reset vector (in headsmp-sh73a0.S) */ + /* Map the reset vector (in headsmp-scu.S) */ __raw_writel(0, APARMBAREA); /* 4k */ - __raw_writel(__pa(sh73a0_secondary_vector), SBAR); + __raw_writel(__pa(shmobile_secondary_vector_scu), SBAR); /* enable cache coherency on booting CPU */ scu_power_mode(scu_base_addr(), SCU_PM_NORMAL);