From patchwork Mon Feb 18 13:47:35 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2159061 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 0DB22DF25A for ; Mon, 18 Feb 2013 13:45:38 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U7Qzt-0005WW-ST; Mon, 18 Feb 2013 13:43:09 +0000 Received: from mail-da0-f51.google.com ([209.85.210.51]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U7Qyl-0004pv-3p for linux-arm-kernel@lists.infradead.org; Mon, 18 Feb 2013 13:42:01 +0000 Received: by mail-da0-f51.google.com with SMTP id n15so2453801dad.38 for ; Mon, 18 Feb 2013 05:41:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:date:message-id:in-reply-to:references :subject; bh=O8pRW6Rfr4KMaiPskbMua/AHVqAb59e2rpZVK4QpZGw=; b=avie9y2GwFZbBQL40+9UZ10s94VKCAYZtVLPHykokLGHCTXqlm2R8XrpaDBTbYiaZ4 FbvJPGSwQAx3tDUgaOJERIF88J+HITDKkNgnT+usnbjssXYCJPsApV9yUPC5+2EENS0N 6PT1K9/uvzYvQqlINsH6BfzUcBNRPl9UZS4UftGCXByOkRuvmyH+pDPnyDp35d8vEF9F NX+zKo73nBjpyejEMrJ3xzWSdPqTkE3TqSlO234DuYazyB919gM7+rNWYVI3tGZF7WWH IYFYFXKbzXD8Hk2PPAnbvDzvXOgbiS/aCNGt9/UYQsMHpH5CuXMQPbB0r4PZevhwe6iB puRQ== X-Received: by 10.66.84.232 with SMTP id c8mr36208515paz.8.1361194917408; Mon, 18 Feb 2013 05:41:57 -0800 (PST) Received: from [127.0.0.1] (FL1-122-135-132-124.tky.mesh.ad.jp. [122.135.132.124]) by mx.google.com with ESMTPS id z6sm77818562pav.3.2013.02.18.05.41.54 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 18 Feb 2013 05:41:56 -0800 (PST) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Mon, 18 Feb 2013 22:47:35 +0900 Message-Id: <20130218134735.17303.76426.sendpatchset@w520> In-Reply-To: <20130218134648.17303.97576.sendpatchset@w520> References: <20130218134648.17303.97576.sendpatchset@w520> Subject: [PATCH 05/08] ARM: shmobile: Update r8a7779 to use scu_power_mode() X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130218_084159_298959_6A228F8D X-CRM114-Status: GOOD ( 14.52 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.51 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (magnus.damm[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: hechtb@gmail.com, horms@verge.net.au, Magnus Damm , arnd@arndb.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Magnus Damm Update the SMP code for R8A7779 to make use of the shared SCU function scu_power_mode() together with the early setup code in shmobile_secondary_vector_scu. With this patch in place the secondary CPUs modify the SCU setting during early boot instead of letting other CPUs deal with the coherency setting before boot. In other words, we used to setup coherency before boot in r8a7779_boot_secondary() but that bit is now instead handled by the code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm --- arch/arm/mach-shmobile/smp-r8a7779.c | 32 +++++--------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) --- 0005/arch/arm/mach-shmobile/smp-r8a7779.c +++ work/arch/arm/mach-shmobile/smp-r8a7779.c 2013-02-18 22:10:26.000000000 +0900 @@ -58,9 +58,6 @@ static struct r8a7779_pm_ch *r8a7779_ch_ [3] = &r8a7779_ch_cpu3, }; -static DEFINE_SPINLOCK(scu_lock); -static unsigned long tmp; - #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29); void __init r8a7779_register_twd(void) @@ -79,20 +76,6 @@ static int r8a7779_scu_psr_core_disabled return 0; } -static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) -{ - void __iomem *scu_base = shmobile_scu_base; - - spin_lock(&scu_lock); - tmp = __raw_readl(scu_base + 8); - tmp &= ~clr; - tmp |= set; - spin_unlock(&scu_lock); - - /* disable cache coherency after releasing the lock */ - __raw_writel(tmp, scu_base + 8); -} - static int r8a7779_platform_cpu_kill(unsigned int cpu) { struct r8a7779_pm_ch *ch = NULL; @@ -133,7 +116,7 @@ static void __maybe_unused r8a7779_cpu_d flush_cache_all(); /* disable cache coherency */ - modify_scu_cpu_psr(3 << (cpu * 8), 0); + scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); /* Endless loop until power off from r8a7779_cpu_kill() */ while (1) @@ -158,9 +141,6 @@ static int __cpuinit r8a7779_boot_second cpu = cpu_logical_map(cpu); - /* enable cache coherency */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); - if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) ch = r8a7779_ch_cpu[cpu]; @@ -172,15 +152,13 @@ static int __cpuinit r8a7779_boot_second static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) { - int cpu = cpu_logical_map(0); - scu_enable(shmobile_scu_base); - /* Map the reset vector (in headsmp.S) */ - __raw_writel(__pa(shmobile_secondary_vector), AVECR); + /* Map the reset vector (in headsmp-scu.S) */ + __raw_writel(__pa(shmobile_secondary_vector_scu), AVECR); - /* enable cache coherency on CPU0 */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); + /* enable cache coherency on booting CPU */ + scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); r8a7779_pm_init();