From patchwork Wed Mar 6 00:22:43 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2222621 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 55852DF24C for ; Wed, 6 Mar 2013 00:20:03 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UD22Z-0001hX-8q; Wed, 06 Mar 2013 00:17:03 +0000 Received: from mail-pb0-f44.google.com ([209.85.160.44]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UD22S-0001g0-Nw for linux-arm-kernel@lists.infradead.org; Wed, 06 Mar 2013 00:16:59 +0000 Received: by mail-pb0-f44.google.com with SMTP id wz12so5193518pbc.17 for ; Tue, 05 Mar 2013 16:16:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:date:message-id:in-reply-to:references :subject; bh=yyaFlQnK7dY/EkpeO9cw0r+5ppT41Xh6Iwsg/qTLsOM=; b=ZfK3VjuZ39HvikhjtZBNgWJcGxOr1BFkc8CUbJhuJga2YSVn9gutjmubBvcBMA+b0V 1cDIu0Dl+Do7jssOt2aRD6WMACYmvb/65UoJgEuJKWWWUD0+bucnjXn234ynGyDY73sk 7zO0rwkXDpoQvraNVglyup0qxmucDwy0sKdxwZKor+SjxLX4g7XtWEimUSsZUYYe6UEI sAZmn48TQpxEk0Sphmk5oQW0XT3fPkMMKS5sxMt1yjfbJ5My/3qM5km8drwEY4/Fweof 25otuPXJqxPKs61n7mKVn5TZ2d7q2G8DKF0L/TldOpIQIn454CSgcU5JqZCshMlA9n79 g4mQ== X-Received: by 10.68.231.42 with SMTP id td10mr21524570pbc.174.1362529015339; Tue, 05 Mar 2013 16:16:55 -0800 (PST) Received: from [127.0.0.1] (FL1-122-135-132-124.tky.mesh.ad.jp. [122.135.132.124]) by mx.google.com with ESMTPS id eg1sm17758818pbb.33.2013.03.05.16.16.52 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 05 Mar 2013 16:16:54 -0800 (PST) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Wed, 06 Mar 2013 09:22:43 +0900 Message-Id: <20130306002243.5430.27806.sendpatchset@w520> In-Reply-To: <20130306002214.5430.43766.sendpatchset@w520> References: <20130306002214.5430.43766.sendpatchset@w520> Subject: [PATCH 03/04] ARM: shmobile: Add EMEV2 TWD support X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130305_191656_902097_12C66C1B X-CRM114-Status: GOOD ( 13.11 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.44 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (magnus.damm[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 0.0 T_FRT_STOCK2 BODY: ReplaceTags: Stock (2) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: horms@verge.net.au, Magnus Damm , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Magnus Damm Add TWD support for the EMEV2 SoC and the KZM9D board. TWD data is added via C for the KZM9D board and also via DT for the generic EMEV2 DT board support. Signed-off-by: Magnus Damm --- arch/arm/boot/dts/emev2.dtsi | 6 ++++++ arch/arm/mach-shmobile/clock-emev2.c | 5 ++++- arch/arm/mach-shmobile/setup-emev2.c | 4 ++++ arch/arm/mach-shmobile/smp-emev2.c | 9 +++++++++ 4 files changed, 23 insertions(+), 1 deletion(-) --- 0001/arch/arm/boot/dts/emev2.dtsi +++ work/arch/arm/boot/dts/emev2.dtsi 2013-03-05 18:37:48.000000000 +0900 @@ -30,6 +30,12 @@ }; }; + timer@e0030600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xe0030600 0x20>; + interrupts = <1 1 0xf04>; + }; + gic: interrupt-controller@e0020000 { compatible = "arm,cortex-a9-gic"; interrupt-controller; --- 0001/arch/arm/mach-shmobile/clock-emev2.c +++ work/arch/arm/mach-shmobile/clock-emev2.c 2013-03-05 18:37:30.000000000 +0900 @@ -31,6 +31,7 @@ #define USIBU2_RSTCTRL 0x0b0 #define USIBU3_RSTCTRL 0x0b4 #define STI_RSTCTRL 0x124 +#define INTAGCLKCTRL 0x40c #define USIAU0GCLKCTRL 0x4a0 #define USIBU1GCLKCTRL 0x4b8 #define USIBU2GCLKCTRL 0x4bc @@ -105,7 +106,7 @@ static struct clk sclkdiv_clks[SCLKDIV_N }; enum { GCLK_USIAU0_SCLK, GCLK_USIBU1_SCLK, GCLK_USIBU2_SCLK, GCLK_USIBU3_SCLK, - GCLK_STI_SCLK, + GCLK_STI_SCLK, GCLK_INTA_CLK, GCLK_NR }; #define GCLK_SCLK(_parent, _reg) \ @@ -125,6 +126,7 @@ static struct clk gclk_clks[GCLK_NR] = { [GCLK_USIBU3_SCLK] = GCLK_SCLK(&sclkdiv_clks[SCLKDIV_USIBU3], USIBU3GCLKCTRL), [GCLK_STI_SCLK] = GCLK_SCLK(&c32k_clk, STIGCLKCTRL), + [GCLK_INTA_CLK] = GCLK_SCLK(&c32k_clk, INTAGCLKCTRL), }; static int emev2_gclk_enable(struct clk *clk) @@ -200,6 +202,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e1050000.uart", &gclk_clks[GCLK_USIBU3_SCLK]), CLKDEV_DEV_ID("em_sti.0", &gclk_clks[GCLK_STI_SCLK]), CLKDEV_DEV_ID("e0180000.sti", &gclk_clks[GCLK_STI_SCLK]), + CLKDEV_DEV_ID("smp_twd", &gclk_clks[GCLK_INTA_CLK]), }; void __init emev2_clock_init(void) --- 0006/arch/arm/mach-shmobile/setup-emev2.c +++ work/arch/arm/mach-shmobile/setup-emev2.c 2013-03-05 18:37:30.000000000 +0900 @@ -402,10 +402,14 @@ void __init emev2_add_standard_devices(v ARRAY_SIZE(emev2_late_devices)); } +/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ +void __init __weak emev2_register_twd(void) { } + void __init emev2_timer_init(void) { emev2_clock_init(); shmobile_timer_init(); + emev2_register_twd(); } static void __init emev2_init_delay(void) --- 0001/arch/arm/mach-shmobile/smp-emev2.c +++ work/arch/arm/mach-shmobile/smp-emev2.c 2013-03-05 18:37:30.000000000 +0900 @@ -28,9 +28,18 @@ #include #include #include +#include #define EMEV2_SCU_BASE 0x1e000000 +#ifdef CONFIG_HAVE_ARM_TWD +static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xe0030600, 17); +void __init emev2_register_twd(void) +{ + twd_local_timer_register(&twd_local_timer); +} +#endif + static void __cpuinit emev2_secondary_init(unsigned int cpu) { gic_secondary_init(0);