@@ -198,6 +198,7 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
const struct imx_pinctrl_soc_info *info = ipctl->info;
const struct imx_pin_reg *pin_reg;
const unsigned *pins, *mux, *input_val;
+ u16 *input_reg;
unsigned int npins, pin_id;
int i;
@@ -209,6 +210,7 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
npins = info->groups[group].npins;
mux = info->groups[group].mux_mode;
input_val = info->groups[group].input_val;
+ input_reg = info->groups[group].input_reg;
WARN_ON(!pins || !npins || !mux || !input_val);
@@ -230,11 +232,11 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
pin_reg->mux_reg, mux[i]);
/* some pins also need select input setting, set it if found */
- if (pin_reg->input_reg) {
- writel(input_val[i], ipctl->base + pin_reg->input_reg);
+ if (input_reg[i]) {
+ writel(input_val[i], ipctl->base + input_reg[i]);
dev_dbg(ipctl->dev,
"==>select_input: offset 0x%x val 0x%x\n",
- pin_reg->input_reg, input_val[i]);
+ input_reg[i], input_val[i]);
}
}
@@ -411,6 +413,8 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
GFP_KERNEL);
grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
GFP_KERNEL);
+ grp->input_reg = devm_kzalloc(info->dev, grp->npins * sizeof(u16),
+ GFP_KERNEL);
grp->input_val = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
GFP_KERNEL);
grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
@@ -424,7 +428,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
grp->pins[i] = pin_id;
pin_reg->mux_reg = mux_reg;
pin_reg->conf_reg = conf_reg;
- pin_reg->input_reg = be32_to_cpu(*list++);
+ grp->input_reg[i] = be32_to_cpu(*list++);
grp->mux_mode[i] = be32_to_cpu(*list++);
grp->input_val[i] = be32_to_cpu(*list++);
@@ -26,6 +26,8 @@ struct platform_device;
* elements in .pins so we can iterate over that array
* @mux_mode: the mux mode for each pin in this group. The size of this
* array is the same as pins.
+ * @input_reg: select input register offset for this mux if any
+ * 0 if no select input setting needed.
* @input_val: the select input value for each pin in this group. The size of
* this array is the same as pins.
* @configs: the config for each pin in this group. The size of this
@@ -36,6 +38,7 @@ struct imx_pin_group {
unsigned int *pins;
unsigned npins;
unsigned int *mux_mode;
+ u16 *input_reg;
unsigned int *input_val;
unsigned long *configs;
};
@@ -56,13 +59,10 @@ struct imx_pmx_func {
* struct imx_pin_reg - describe a pin reg map
* @mux_reg: mux register offset
* @conf_reg: config register offset
- * @input_reg: select input register offset for this mux if any
- * 0 if no select input setting needed.
*/
struct imx_pin_reg {
u16 mux_reg;
u16 conf_reg;
- u16 input_reg;
};
struct imx_pinctrl_soc_info {