From patchwork Mon Apr 8 06:09:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2405081 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 15933DFB78 for ; Mon, 8 Apr 2013 06:09:15 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UP5GJ-0001ve-7C; Mon, 08 Apr 2013 06:09:03 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UP5GG-00089z-CV; Mon, 08 Apr 2013 06:09:00 +0000 Received: from mail-db8lp0184.outbound.messaging.microsoft.com ([213.199.154.184] helo=db8outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UP5GD-00089e-1N for linux-arm-kernel@lists.infradead.org; Mon, 08 Apr 2013 06:08:57 +0000 Received: from mail14-db8-R.bigfish.com (10.174.8.251) by DB8EHSOBE029.bigfish.com (10.174.4.92) with Microsoft SMTP Server id 14.1.225.23; Mon, 8 Apr 2013 06:08:54 +0000 Received: from mail14-db8 (localhost [127.0.0.1]) by mail14-db8-R.bigfish.com (Postfix) with ESMTP id 28D875E0080; Mon, 8 Apr 2013 06:08:54 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 5 X-BigFish: VS5(za62pz98dI9371I1432Izz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahz8dhz8275dhz2dh87h2a8h668h839h944hd25hf0ah1220h1288h12a5h12a9h12bdh137ah13b6h1441h1504h1537h153bh162dh1631h1758h18e1h1946h19b5h1ad9h1b0ah1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail14-db8 (localhost.localdomain [127.0.0.1]) by mail14-db8 (MessageSwitch) id 1365401330644361_21253; Mon, 8 Apr 2013 06:08:50 +0000 (UTC) Received: from DB8EHSMHS015.bigfish.com (unknown [10.174.8.226]) by mail14-db8.bigfish.com (Postfix) with ESMTP id 90316980045; Mon, 8 Apr 2013 06:08:50 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB8EHSMHS015.bigfish.com (10.174.4.25) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 8 Apr 2013 06:08:50 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.328.11; Mon, 8 Apr 2013 06:08:49 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.95]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r3868ieF006451; Sun, 7 Apr 2013 23:08:45 -0700 Date: Mon, 8 Apr 2013 14:09:00 +0800 From: Shawn Guo To: Fabio Estevam Subject: Re: [PATCH v2 0/3] Get rid of big array from imx pinctrl driver Message-ID: <20130408060857.GA5047@S2101-09.ap.freescale.net> References: <1361533888-18073-1-git-send-email-shawn.guo@linaro.org> <20130407071028.GD11898@S2101-09.ap.freescale.net> <20130407142610.GE11898@S2101-09.ap.freescale.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130408_020857_292371_6DDFC9DA X-CRM114-Status: GOOD ( 17.25 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [213.199.154.184 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Linus Walleij , Dong Aisheng , Sascha Hauer , linux-arm-kernel@lists.infradead.org, Stephen Warren X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On Sun, Apr 07, 2013 at 11:32:45AM -0300, Fabio Estevam wrote: > On Sun, Apr 7, 2013 at 11:26 AM, Shawn Guo wrote: > > > That's expected, as the pin ID gets re-numbered based on offset of > > mux/conf register, so that we can determine the pin ID at runtime and > > avoid encoding it in device tree. > > but debug messages seems buggy now: > Yes, you are right. The change attached below should fix the problem. I am fixing it up for all imx pinctrl drivers on imx/dt branch. > Prior to the patch we had: > > imx6q-pinctrl 20e0000.iomuxc: pinconf set pin MX6Q_PAD_EIM_D21 > > and now we have: > > imx6q-pinctrl 20e0000.iomuxc: pinconf set pin MX6Q_PAD_EIM_A17 > > MX6Q_PAD_EIM_A17 has nothing to do with I2C, so we should print > MX6Q_PAD_EIM_A17 when we are actually configuring MX6Q_PAD_EIM_D21. > > Also, where does the 19 offset in the imx6q_pads enum come from? We choose to have the pin ID simply calculated from register offset. For example, the mux register offset for MX6Q_PAD_SD2_DAT1 is 0x4c, and the ID would be 0x4c / 4 = 19. Shawn --8<----- diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c index f00f532..76dd9c4 100644 --- a/drivers/pinctrl/pinctrl-imx6q.c +++ b/drivers/pinctrl/pinctrl-imx6q.c @@ -23,6 +23,25 @@ #include "pinctrl-imx.h" enum imx6q_pads { + MX6Q_PAD_RESERVE0 = 0, + MX6Q_PAD_RESERVE1 = 1, + MX6Q_PAD_RESERVE2 = 2, + MX6Q_PAD_RESERVE3 = 3, + MX6Q_PAD_RESERVE4 = 4, + MX6Q_PAD_RESERVE5 = 5, + MX6Q_PAD_RESERVE6 = 6, + MX6Q_PAD_RESERVE7 = 7, + MX6Q_PAD_RESERVE8 = 8, + MX6Q_PAD_RESERVE9 = 9, + MX6Q_PAD_RESERVE10 = 10, + MX6Q_PAD_RESERVE11 = 11, + MX6Q_PAD_RESERVE12 = 12, + MX6Q_PAD_RESERVE13 = 13, + MX6Q_PAD_RESERVE14 = 14, + MX6Q_PAD_RESERVE15 = 15, + MX6Q_PAD_RESERVE16 = 16, + MX6Q_PAD_RESERVE17 = 17, + MX6Q_PAD_RESERVE18 = 18, MX6Q_PAD_SD2_DAT1 = 19, MX6Q_PAD_SD2_DAT2 = 20, MX6Q_PAD_SD2_DAT0 = 21, @@ -224,6 +243,25 @@ enum imx6q_pads { /* Pad names for the pinmux subsystem */ static const struct pinctrl_pin_desc imx6q_pinctrl_pads[] = { + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE0), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE1), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE2), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE3), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE4), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE5), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE6), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE7), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE8), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE9), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE10), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE11), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE12), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE13), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE14), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE15), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE16), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE17), + IMX_PINCTRL_PIN(MX6Q_PAD_RESERVE18), IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT1), IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT2), IMX_PINCTRL_PIN(MX6Q_PAD_SD2_DAT0),