From patchwork Fri Apr 12 12:13:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Fuzzey X-Patchwork-Id: 2435011 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 59203DF2A1 for ; Fri, 12 Apr 2013 12:13:42 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UQcrK-0003ze-Qn; Fri, 12 Apr 2013 12:13:38 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UQcrI-00022o-0c; Fri, 12 Apr 2013 12:13:36 +0000 Received: from mta1.parkeon.com ([91.121.43.66]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UQcrE-00022D-V8 for linux-arm-kernel@lists.infradead.org; Fri, 12 Apr 2013 12:13:34 +0000 Received: from ip71.parkeon.com ([213.152.31.71] helo=mta2.parkeon.com) by mta1.parkeon.com with esmtp (Exim 4.76) (envelope-from ) id 1UQcrB-0002QZ-Ov; Fri, 12 Apr 2013 14:13:29 +0200 Received: from [10.32.16.23] (helo=mail.besancon.parkeon.com) by mta2.parkeon.com with esmtp (Exim 4.77) (envelope-from ) id 1UQcr5-0005Gt-Sp; Fri, 12 Apr 2013 14:13:23 +0200 Received: from [10.32.51.221] (port=60178 helo=[127.0.0.1]) by mail.besancon.parkeon.com with esmtp (Exim 4.71) (envelope-from ) id 1UQcrB-0001iZ-IX; Fri, 12 Apr 2013 14:13:29 +0200 Subject: [PATCH] ARM: i.MX5 Allow DT clock providers To: Sascha Hauer , linux-arm-kernel@lists.infradead.org From: Martin Fuzzey Date: Fri, 12 Apr 2013 14:13:29 +0200 Message-ID: <20130412121329.3965.30768.stgit@localhost> User-Agent: StGit/0.15 MIME-Version: 1.0 X-Virus-Scanned: by ClamAV at mta2.parkeon.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130412_081333_114425_47B455F1 X-CRM114-Status: GOOD ( 12.58 ) X-Spam-Score: -4.3 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -2.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Currently clock providers defined in the DT are not registered on i.MX5 platforms since of_clk_init() is not called. This is not a problem for the SOC's own clocks, which are registered in code, but prevents the DT being used to define clocks for external hardware. Fix this by calling of_clk_init() and actually using the DT to obtain the 4 SOC fixed clocks. These are already defined in the DT but were previously just used to manually obtain the rate. Fall back to the old scheme for non DT platforms. Signed-off-by: Martin Fuzzey --- arch/arm/mach-imx/clk-imx51-imx53.c | 75 +++++++++++++++++++---------------- 1 files changed, 41 insertions(+), 34 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 3228b4e..342c8b3 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -117,17 +117,52 @@ enum imx5_clks { static struct clk *clk[clk_max]; static struct clk_onecell_data clk_data; + +static struct clk * __init mx5_obtain_fixed_clock_from_dt(const char *name) +{ +#ifdef CONFIG_OF + char compatible[20]; + struct of_phandle_args phandle = {0}; + struct clk *clk = NULL; + + scnprintf(compatible, sizeof(compatible), "fsl,imx-%s", name); + phandle.np = of_find_compatible_node(NULL, NULL, compatible); + if (phandle.np) { + clk = of_clk_get_from_provider(&phandle); + of_node_put(phandle.np); + } + return clk; +#else + return NULL; +#endif +} + +static struct clk * __init mx5_obtain_fixed_clock( + const char *name, unsigned long rate) +{ + struct clk *clk; + + clk = mx5_obtain_fixed_clock_from_dt(name); + if (IS_ERR_OR_NULL(clk)) + clk = imx_clk_fixed(name, rate); + return clk; +} + static void __init mx5_clocks_common_init(unsigned long rate_ckil, unsigned long rate_osc, unsigned long rate_ckih1, unsigned long rate_ckih2) { int i; +#ifdef CONFIG_OF + of_clk_init(NULL); +#endif + clk[dummy] = imx_clk_fixed("dummy", 0); - clk[ckil] = imx_clk_fixed("ckil", rate_ckil); - clk[osc] = imx_clk_fixed("osc", rate_osc); - clk[ckih1] = imx_clk_fixed("ckih1", rate_ckih1); - clk[ckih2] = imx_clk_fixed("ckih2", rate_ckih2); + clk[ckil] = mx5_obtain_fixed_clock("ckil", rate_ckil); + clk[osc] = mx5_obtain_fixed_clock("osc", rate_osc); + clk[ckih1] = mx5_obtain_fixed_clock("ckih1", rate_ckih1); + clk[ckih2] = mx5_obtain_fixed_clock("ckih2", rate_ckih2); clk[lp_apm] = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1, lp_apm_sel, ARRAY_SIZE(lp_apm_sel)); @@ -540,41 +575,13 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, } #ifdef CONFIG_OF -static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc, - unsigned long *ckih1, unsigned long *ckih2) -{ - struct device_node *np; - - /* retrieve the freqency of fixed clocks from device tree */ - for_each_compatible_node(np, NULL, "fixed-clock") { - u32 rate; - if (of_property_read_u32(np, "clock-frequency", &rate)) - continue; - - if (of_device_is_compatible(np, "fsl,imx-ckil")) - *ckil = rate; - else if (of_device_is_compatible(np, "fsl,imx-osc")) - *osc = rate; - else if (of_device_is_compatible(np, "fsl,imx-ckih1")) - *ckih1 = rate; - else if (of_device_is_compatible(np, "fsl,imx-ckih2")) - *ckih2 = rate; - } -} - int __init mx51_clocks_init_dt(void) { - unsigned long ckil, osc, ckih1, ckih2; - - clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2); - return mx51_clocks_init(ckil, osc, ckih1, ckih2); + return mx51_clocks_init(0, 0, 0, 0); } int __init mx53_clocks_init_dt(void) { - unsigned long ckil, osc, ckih1, ckih2; - - clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2); - return mx53_clocks_init(ckil, osc, ckih1, ckih2); + return mx53_clocks_init(0, 0, 0, 0); } #endif