From patchwork Thu May 30 08:52:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2634111 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 69B203FD2B for ; Thu, 30 May 2013 08:46:33 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UhyUO-0004Ib-2B; Thu, 30 May 2013 08:45:41 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UhyTy-0001cS-Re; Thu, 30 May 2013 08:45:14 +0000 Received: from mail-pb0-x22e.google.com ([2607:f8b0:400e:c01::22e]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UhyTo-0001Ze-9r for linux-arm-kernel@lists.infradead.org; Thu, 30 May 2013 08:45:08 +0000 Received: by mail-pb0-f46.google.com with SMTP id rq2so10709532pbb.19 for ; Thu, 30 May 2013 01:44:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=Oo/sfdSiv/cD1GEOL/EcUpGEwfnw7UnitW22D4eKjE0=; b=qvP3G+m/g6W32Tgz8cLQyO79TSxO5dHK4JryGGELkWMUHVtpaGLoJ+jilNF8F/KS+s iG7xfkt9QX+PKnYK2IpKaWUIfiDpHbmagbSASy5Cj1fuwbrcizjAh/FNuf0EYbnEjau4 krpqNUrWT3PpWSowAX6kJuV/0ZP2cLuYsSn4J94qKlebpuH6d3+FVYgAKQvI/rJ4HwPu +HHlmWDg8wKUQnN7pGdaAAaslLnGWlwhneSYBoFZGAq7s3+dSPYofzuy1B9LxSl1lz5/ lUJJ6/raZCPrg8euq6f1XW81+hhyeQGGgc2ALtnnjzdF+q7DQbU59zo8pDeWgCMlDP24 hYZQ== X-Received: by 10.68.107.225 with SMTP id hf1mr6810027pbb.130.1369903481237; Thu, 30 May 2013 01:44:41 -0700 (PDT) Received: from [127.0.0.1] (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id qi1sm43774767pac.21.2013.05.30.01.44.38 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 30 May 2013 01:44:40 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Thu, 30 May 2013 17:52:01 +0900 Message-Id: <20130530085201.24374.97084.sendpatchset@w520> In-Reply-To: <20130530085152.24374.64208.sendpatchset@w520> References: <20130530085152.24374.64208.sendpatchset@w520> Subject: [PATCH 01/05] ARM: shmobile: r8a73a4 SMP prototype v1 (CA15 x 4) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130530_044504_599204_9E171645 X-CRM114-Status: GOOD ( 15.98 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (magnus.damm[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: arnd@arndb.de, Magnus Damm , horms@verge.net.au, ulrich.hecht@gmail.com, olof@lixom.net, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Magnus Damm Add SMP prototype support for r8a73a4 by enabling 4 x Cortex-A15. This patch only adds support for booting, see the incremental patch for CPU Hotplug. Needs a rewrite to support more generic handling of CPU core power domains. Not ready for merge. Not-yet-Signed-off-by: Magnus Damm --- Developed and tested on top of v3.10-rc2 arch/arm/boot/dts/r8a73a4.dtsi | 21 +++++ arch/arm/mach-shmobile/Makefile | 1 arch/arm/mach-shmobile/board-ape6evm.c | 1 arch/arm/mach-shmobile/include/mach/r8a73a4.h | 1 arch/arm/mach-shmobile/setup-r8a73a4.c | 1 arch/arm/mach-shmobile/smp-r8a73a4.c | 89 +++++++++++++++++++++++++ 6 files changed, 114 insertions(+) --- 0003/arch/arm/boot/dts/r8a73a4.dtsi +++ work/arch/arm/boot/dts/r8a73a4.dtsi 2013-05-22 13:21:21.000000000 +0900 @@ -25,6 +25,27 @@ reg = <0>; clock-frequency = <1500000000>; }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <1>; + clock-frequency = <1500000000>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <2>; + clock-frequency = <1500000000>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <3>; + clock-frequency = <1500000000>; + }; }; gic: interrupt-controller@f1001000 { --- 0001/arch/arm/mach-shmobile/Makefile +++ work/arch/arm/mach-shmobile/Makefile 2013-05-22 13:21:21.000000000 +0900 @@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2. # SMP objects smp-y := platsmp.o headsmp.o smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o +smp-$(CONFIG_ARCH_R8A73A4) += smp-r8a73a4.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o --- 0001/arch/arm/mach-shmobile/board-ape6evm.c +++ work/arch/arm/mach-shmobile/board-ape6evm.c 2013-05-22 13:21:51.000000000 +0900 @@ -87,6 +87,7 @@ static const char *ape6evm_boards_compat }; DT_MACHINE_START(APE6EVM_DT, "ape6evm") + .smp = smp_ops(r8a73a4_smp_ops), .init_irq = irqchip_init, .init_time = shmobile_timer_init, .init_machine = ape6evm_add_standard_devices, --- 0001/arch/arm/mach-shmobile/include/mach/r8a73a4.h +++ work/arch/arm/mach-shmobile/include/mach/r8a73a4.h 2013-05-22 13:21:21.000000000 +0900 @@ -4,5 +4,6 @@ void r8a73a4_add_standard_devices(void); void r8a73a4_clock_init(void); void r8a73a4_pinmux_init(void); +extern struct smp_operations r8a73a4_smp_ops; #endif /* __ASM_R8A73A4_H__ */ --- 0001/arch/arm/mach-shmobile/setup-r8a73a4.c +++ work/arch/arm/mach-shmobile/setup-r8a73a4.c 2013-05-22 13:21:44.000000000 +0900 @@ -194,6 +194,7 @@ static const char *r8a73a4_boards_compat }; DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)") + .smp = smp_ops(r8a73a4_smp_ops), .init_irq = irqchip_init, .init_machine = r8a73a4_add_standard_devices_dt, .init_time = shmobile_timer_init, --- /dev/null +++ work/arch/arm/mach-shmobile/smp-r8a73a4.c 2013-05-22 13:21:21.000000000 +0900 @@ -0,0 +1,89 @@ +/* + * SMP support for r8a73a4 + * + * Copyright (C) 2012 Renesas Solutions Corp. + * Copyright (C) 2012 Takashi Yoshii + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define SYSC 0xe6180000 +#define CA15BAR 0x6020 +#define RESCNT 0x801c + +#define APMU 0xe6150000 +#define CA15WUPCR 0x2010 + +#define MERAM 0xe8080000 +#define CCI_BASE 0xf0190000 +#define CCI_SLAVE3 0x4000 +#define CCI_SNOOP 0x0000 +#define CCI_STATUS 0x000c + +static void __init r8a73a4_smp_prepare_cpus(unsigned int max_cpus) +{ + u32 bar; + void __iomem *p; + + /* MERAM for jump stub, because BAR requires 256KB aligned address */ + p = ioremap_nocache(MERAM, 16); + memcpy(p, shmobile_secondary_vector, 16); + iounmap(p); + + flush_cache_louis(); + + /* setup reset vector and disable reset */ + p = ioremap_nocache(SYSC, 0x9000); + bar = (MERAM >> 8) & 0xfffffc00; + __raw_writel(bar, p + CA15BAR); + __raw_writel(bar | 0x10, p + CA15BAR); + __raw_writel(__raw_readl(p + RESCNT) & ~(1 << 10), p + RESCNT); + iounmap(p); + + /* enable snoop and DVM */ + p = ioremap_nocache(CCI_BASE, 0x8000); + __raw_writel(3, p + CCI_SLAVE3 + CCI_SNOOP); /* ca15 */ + while (__raw_readl(p + CCI_STATUS)) + /* wait for pending bit low */; + iounmap(p); +} + +static int __cpuinit r8a73a4_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + void __iomem *p; + + /* wake up CPU core */ + p = ioremap_nocache(APMU, 0x3000); + __raw_writel(1 << (cpu_logical_map(cpu) & 3), p + CA15WUPCR); + iounmap(p); + + return 0; +} + +struct smp_operations r8a73a4_smp_ops __initdata = { + .smp_prepare_cpus = r8a73a4_smp_prepare_cpus, + .smp_boot_secondary = r8a73a4_boot_secondary, +};