From patchwork Tue Jun 4 19:47:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 2661981 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id A9A133FC8C for ; Tue, 4 Jun 2013 19:47:34 +0000 (UTC) Received: from merlin.infradead.org ([205.233.59.134]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UjxCf-00074q-76; Tue, 04 Jun 2013 19:47:33 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UjxCd-0006Ir-6Q; Tue, 04 Jun 2013 19:47:31 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UjxCa-0006HI-37 for linux-arm-kernel@lists.infradead.org; Tue, 04 Jun 2013 19:47:29 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id E68C813EED8; Tue, 4 Jun 2013 19:47:06 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id D9A1013EF8D; Tue, 4 Jun 2013 19:47:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-caf-smtp.dmz.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED autolearn=ham version=3.3.1 Received: from localhost (i-global252.qualcomm.com [199.106.103.252]) (using SSLv3 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 719E113EED8; Tue, 4 Jun 2013 19:47:06 +0000 (UTC) Date: Tue, 4 Jun 2013 12:47:05 -0700 From: Stephen Boyd To: Nicolas Pitre Subject: Re: [PATCH] ARM: avoid mis-detecting some V7 cores in the decompressor Message-ID: <20130604194705.GK599@codeaurora.org> References: <5193E424.9090605@codeaurora.org> <519E57D2.3050000@codeaurora.org> <20130523231531.GT18614@n2100.arm.linux.org.uk> <20130524220539.GB599@codeaurora.org> <51AD0703.6050408@codeaurora.org> <20130603222321.GP18614@n2100.arm.linux.org.uk> <51AD1AB3.9050908@codeaurora.org> <20130603224555.GR18614@n2100.arm.linux.org.uk> <51AD1FE9.80709@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-06-14) X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130604_154728_252487_8DC25D5B X-CRM114-Status: GOOD ( 42.96 ) X-Spam-Score: -2.4 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Brian Swetland , Russell King - ARM Linux , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On 06/04, Nicolas Pitre wrote: > On Mon, 3 Jun 2013, Stephen Boyd wrote: > > > On 06/03/13 15:45, Russell King - ARM Linux wrote: > > > On Mon, Jun 03, 2013 at 03:37:39PM -0700, Stephen Boyd wrote: > > >> In my case I'm booting a kernel with textoffset = 0x208000 but RAM > > >> starts at 0x0. Does "minimum of RAM start" mean 0x0 or 0x200000? > > > The basic requirement for zImage's is no less than the start of RAM > > > plus 32K. Or let me put it another way - start of writable memory > > > plus 32K. > > > > > > Whether you need an offset of 0x200000 or not is not for the > > > decompressor to know. If you're having to avoid the first 0x200000 > > > bytes of memory for some reason (eg, secure firmware or DSP needs > > > it left free) then there's no way for the decompressor to know that, > > > so it's irrelevant. > > > > > > So, lets say that your platform has a DSP which needs the first 0x200000 > > > bytes left free. So the boot loader _already_ needs to know to load > > > the image not at zero, but above 0x200000. The additional 32K > > > requirement is really nothing new and so should be treated in just the > > > same way. > > > > > > Leave at least 32K of usable memory below the zImage at all times. > > > > Understood. On my device writeable RAM actually starts at 0x0 but I have > > compiled in support for devices which don't have writeable memory at > > 0x0, instead they have writeable memory starting at 0x200000. Because I > > have a kernel supporting more than one device with differing memory > > layouts I run into this problem. The same problem will occur to any > > devices in the multi-platform kernel when a device with unwriteable > > memory near the bottom (such as MSM8960) joins the multi-platform defconfig. > > > > Let me try to word it in your example. I have compiled in support for a > > platform that has a DSP which needs the first 0x200000 bytes left free. > > I have also compiled in support for a platform that doesn't have this > > requirement. I plan to run the zImage on the second platform (the one > > without the DSP requirement). The bootloader I'm running this zImage on > > has no idea that I've compiled in support for the other platform with > > the DSP requirement so it assumes it can load the zImage at the start of > > RAM (0x0) plus 32K. This is bad because then the page tables get written > > into my compressed data and it fails to decompress. > > I've looked at the code and I think that #1 in your initial options is > probably best here. I agree with Russell about #2 being way too complex > for only this case. > > So, right before calling into cache_on, you could test if r4 - 16K >= pc > and r4 < pc + (_end - .) then skip cache_on. > > Something like this untested patch: So this would cause the decompression to run without the cache on if we have to relocate the decompression code to avoid overwriting ourselves? It seems that the memcpy is fairly quick on my hardware in comparison to the decompression so moving the cache_on() call to right before we run decompression keeps things pretty fast. It's very possible different hardware will have different results. This is what I meant by option #1. I suppose we can make it smarter and conditionalize it on if we relocated or not? ----8<--- diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index fe4d9c3..fcf3ff3 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -182,8 +182,6 @@ not_angel: ldr r4, =zreladdr #endif - bl cache_on - restart: adr r0, LC0 ldmia r0, {r1, r2, r3, r6, r10, r11, r12} ldr sp, [r0, #28] @@ -464,6 +462,7 @@ not_relocated: mov r0, #0 cmp r2, r3 blo 1b + bl cache_on /* * The C runtime environment should now be setup sufficiently. * Set up some pointers, and start decompressing.