From patchwork Wed Jun 5 10:44:37 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2668611 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 5F93ADF264 for ; Wed, 5 Jun 2013 10:38:28 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UkB6A-0005gU-C2; Wed, 05 Jun 2013 10:37:47 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UkB5y-0006WT-Qy; Wed, 05 Jun 2013 10:37:34 +0000 Received: from mail-pd0-f170.google.com ([209.85.192.170]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UkB5v-0006Uc-Hb for linux-arm-kernel@lists.infradead.org; Wed, 05 Jun 2013 10:37:32 +0000 Received: by mail-pd0-f170.google.com with SMTP id x10so1641825pdj.1 for ; Wed, 05 Jun 2013 03:37:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=OU9mCDQgH/RfRLMt00sUHTgHAtBFS488TyfRW4aafHo=; b=cWCLIVCMjbdbkFr1ZVEnPeyQkHui4L86rH0MQyGecZsTLQ0FL+pJvZ2oMjL0z2uko8 XDWOP/EzhQoxd08A4D7/5WPtL0r66IuNTn0EVfSLmoNF4xOvzJowx4Lo4JBgMHeZ159n 197JC0D34JfT9JQVHbn4RV4g1oj3hLa2D5Jq2A6vDFs3qkEAMMVkajwNESmAciDEIbTh vgPgYKHg/nK5/jXzb2+rcDht7qu7ni5Rf8HEN8h4htn5Kh2NY8EL2IYoeDo7+9Q9IKI7 e0HzdYOtf5DpMSI30yw2ncp8WI4q2Ntwwi9uTzHA7uuVtY5vk+UNt/ORXZjIy6jdx1AI xdJg== X-Received: by 10.68.197.2 with SMTP id iq2mr33427079pbc.33.1370428630101; Wed, 05 Jun 2013 03:37:10 -0700 (PDT) Received: from [127.0.0.1] (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id cq1sm67543528pbc.13.2013.06.05.03.37.07 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 05 Jun 2013 03:37:09 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Wed, 05 Jun 2013 19:44:37 +0900 Message-Id: <20130605104437.1720.36474.sendpatchset@w520> In-Reply-To: <20130605104427.1720.68752.sendpatchset@w520> References: <20130605104427.1720.68752.sendpatchset@w520> Subject: [PATCH 01/03] ARM: Let arm_add_memory() always use 64-bit arguments X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130605_063731_684597_1EE43861 X-CRM114-Status: UNSURE ( 9.53 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [209.85.192.170 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (magnus.damm[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: arnd@arndb.de, catalin.marinas@arm.com, Magnus Damm , horms@verge.net.au, laurent.pinchart@ideasonboard.com, olof@lixom.net, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Magnus Damm The DTB and/or the kernel command line may pass 64-bit addresses regardless of kernel configuration, so update arm_add_memory() to take 64-bit arguments independently of the phys_addr_t size. This allows non-wrapping handling of high memory banks such as the second memory bank of APE6EVM (at 0x2_0000_0000) in case of 32-bit phys_addr_t. Signed-off-by: Magnus Damm --- arch/arm/include/asm/setup.h | 2 +- arch/arm/kernel/setup.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) --- 0001/arch/arm/include/asm/setup.h +++ work/arch/arm/include/asm/setup.h 2013-06-05 18:47:09.000000000 +0900 @@ -49,7 +49,7 @@ extern struct meminfo meminfo; #define bank_phys_end(bank) ((bank)->start + (bank)->size) #define bank_phys_size(bank) (bank)->size -extern int arm_add_memory(phys_addr_t start, phys_addr_t size); +extern int arm_add_memory(u64 start, u64 size); extern void early_print(const char *str, ...); extern void dump_machine_table(void); --- 0001/arch/arm/kernel/setup.c +++ work/arch/arm/kernel/setup.c 2013-06-05 18:47:34.000000000 +0900 @@ -527,7 +527,7 @@ void __init dump_machine_table(void) /* can't use cpu_relax() here as it may require MMU setup */; } -int __init arm_add_memory(phys_addr_t start, phys_addr_t size) +int __init arm_add_memory(u64 start, u64 size) { struct membank *bank = &meminfo.bank[meminfo.nr_banks]; @@ -577,8 +577,8 @@ int __init arm_add_memory(phys_addr_t st static int __init early_mem(char *p) { static int usermem __initdata = 0; - phys_addr_t size; - phys_addr_t start; + u64 size; + u64 start; char *endp; /*