From patchwork Fri Jun 28 11:27:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Magnus Damm X-Patchwork-Id: 2798541 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3D4569F3C3 for ; Fri, 28 Jun 2013 12:01:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BD1B20165 for ; Fri, 28 Jun 2013 12:01:57 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F62120153 for ; Fri, 28 Jun 2013 12:01:52 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UsWt0-0007y0-KH; Fri, 28 Jun 2013 11:30:52 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UsWpz-0002Gf-62; Fri, 28 Jun 2013 11:27:35 +0000 Received: from mail-pb0-x22a.google.com ([2607:f8b0:400e:c01::22a]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UsWpo-0002Ex-SO for linux-arm-kernel@lists.infradead.org; Fri, 28 Jun 2013 11:27:26 +0000 Received: by mail-pb0-f42.google.com with SMTP id un1so2163536pbc.29 for ; Fri, 28 Jun 2013 04:27:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:date:message-id:in-reply-to:references:subject; bh=J9J9JWZ2FnnBWxw1dXXa3ocX1ApzY9khQxKH+B2GGI4=; b=teOQ+A7Ku2fRIxErksYBi2ZbynU5upJ9HSUosDdav9DL4xlOgQRcJ7fQtXdnfg61aQ 9hXM0AwwmQWeNkPe6jTS9AuCJrxBXqTcI77JR/dS/kcsG6VRrXUJb0NbvYVuyoij9zcd M4QFR0a20QmY96jOE12BU3u78Ouhz4ATZYo+N6juSt1ojovMqUZ407dtKLbViQgJk7a0 Sl6UXwYaD05f8InnAobXJKIKlnBZCa2C/Mgc/TfIdok3owXkDhqS6jdghhfNz1hVTJEh zZVSDNaUkQ3va9cwOZ1eo7Nd7BRcM/IQzqtqyegVUTYRzRcjnztfCP5N1EWuPzYPbX1h ru9w== X-Received: by 10.66.166.232 with SMTP id zj8mr11030642pab.139.1372418822602; Fri, 28 Jun 2013 04:27:02 -0700 (PDT) Received: from [127.0.0.1] (ac230065.ppp.asahi-net.or.jp. [183.77.230.65]) by mx.google.com with ESMTPSA id qe10sm7767096pbb.2.2013.06.28.04.27.00 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 28 Jun 2013 04:27:01 -0700 (PDT) From: Magnus Damm To: linux-sh@vger.kernel.org Date: Fri, 28 Jun 2013 20:27:04 +0900 Message-Id: <20130628112704.23809.81183.sendpatchset@w520> In-Reply-To: <20130628112655.23809.39115.sendpatchset@w520> References: <20130628112655.23809.39115.sendpatchset@w520> Subject: [PATCH 01/04] ARM: shmobile: Add r8a7790 CMT00 clock event X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130628_072725_147300_3B4398B9 X-CRM114-Status: GOOD ( 12.55 ) X-Spam-Score: -2.0 (--) Cc: olof@lixom.net, horms@verge.net.au, Magnus Damm , arnd@arndb.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Add clock event support for CMT0 timer channel 0 to the r8a7790 SoC code. On most ARM mach-shmobile the CMT is hooked up to a 32KHz clock but on r8a7790 a 31.7KHz clock is instead used. Signed-off-by: Magnus Damm --- arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++ arch/arm/mach-shmobile/setup-r8a7790.c | 21 +++++++++++++++++++++ 2 files changed, 25 insertions(+) --- 0002/arch/arm/mach-shmobile/clock-r8a7790.c +++ work/arch/arm/mach-shmobile/clock-r8a7790.c 2013-06-28 15:23:13.000000000 +0900 @@ -47,6 +47,7 @@ #define CPG_BASE 0xe6150000 #define CPG_LEN 0x1000 +#define SMSTPCR1 0xe6150134 #define SMSTPCR2 0xe6150138 #define SMSTPCR3 0xe615013c #define SMSTPCR5 0xe6150144 @@ -186,6 +187,7 @@ enum { MSTP522, MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, + MSTP124, MSTP_NR }; @@ -208,6 +210,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */ [MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */ [MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */ + [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */ }; static struct clk_lookup lookups[] = { @@ -270,6 +273,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]), CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]), CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), + CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), }; #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ --- 0001/arch/arm/mach-shmobile/setup-r8a7790.c +++ work/arch/arm/mach-shmobile/setup-r8a7790.c 2013-06-28 15:21:02.000000000 +0900 @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -160,6 +161,25 @@ static struct resource thermal_resources thermal_resources, \ ARRAY_SIZE(thermal_resources)) +static struct sh_timer_config cmt00_platform_data = { + .name = "CMT00", + .timer_bit = 0, + .clockevent_rating = 80, +}; + +static struct resource cmt00_resources[] = { + DEFINE_RES_MEM(0xffca0510, 0x0c), + DEFINE_RES_MEM(0xffca0500, 0x04), + DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */ +}; + +#define r8a7790_register_cmt(idx) \ + platform_device_register_resndata(&platform_bus, "sh_cmt", \ + idx, cmt##idx##_resources, \ + ARRAY_SIZE(cmt##idx##_resources), \ + &cmt##idx##_platform_data, \ + sizeof(struct sh_timer_config)) + void __init r8a7790_add_standard_devices(void) { r8a7790_register_scif(SCIFA0); @@ -174,6 +194,7 @@ void __init r8a7790_add_standard_devices r8a7790_register_scif(HSCIF1); r8a7790_register_irqc(0); r8a7790_register_thermal(); + r8a7790_register_cmt(00); } void __init r8a7790_timer_init(void)