@@ -17,7 +17,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.
# SMP objects
smp-y := platsmp.o headsmp.o
-smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o
+smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o
@@ -50,30 +50,30 @@ void __init sh73a0_register_twd(void)
static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
- cpu = cpu_logical_map(cpu);
+ unsigned int lcpu = cpu_logical_map(cpu);
+ int ret;
- if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
- __raw_writel(1 << cpu, WUPCR); /* wake up */
+ ret = shmobile_smp_scu_boot_secondary(cpu, idle);
+ if (ret)
+ return ret;
+
+ if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3)
+ __raw_writel(1 << lcpu, WUPCR); /* wake up */
else
- __raw_writel(1 << cpu, SRESCR); /* reset */
+ __raw_writel(1 << lcpu, SRESCR); /* reset */
return 0;
}
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
{
- /* setup sh73a0 specific SCU base */
- shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
- scu_enable(shmobile_scu_base);
-
- /* Map the reset vector (in headsmp-scu.S, headsmp.S) */
+ /* Map the reset vector (in headsmp.S) */
__raw_writel(0, APARMBAREA); /* 4k */
__raw_writel(__pa(shmobile_boot_vector), SBAR);
- shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
- shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- /* enable cache coherency on booting CPU */
- scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
+ /* setup sh73a0 specific SCU bits */
+ shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
+ shmobile_smp_scu_prepare_cpus(max_cpus);
}
#ifdef CONFIG_HOTPLUG_CPU