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[02/02] ARM: shmobile: Add r8a73a4 CA15 CPU cores and APMU as DTS

Message ID 20130807225550.9856.13251.sendpatchset@w520 (mailing list archive)
State New, archived
Headers show

Commit Message

Magnus Damm Aug. 7, 2013, 10:55 p.m. UTC 
From: Magnus Damm <damm@opensource.se>

Add CA15 CPU cores to r8a73a4 for a total of 4 x CA15
and also add an APMU node for SMP power management.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/boot/dts/r8a73a4.dtsi |   27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)
diff mbox

Patch

--- 0001/arch/arm/boot/dts/r8a73a4.dtsi
+++ work/arch/arm/boot/dts/r8a73a4.dtsi	2013-08-07 19:20:37.000000000 +0900
@@ -25,6 +25,33 @@ 
 			reg = <0>;
 			clock-frequency = <1500000000>;
 		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <1>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <2>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <3>;
+			clock-frequency = <1500000000>;
+		};
+	};
+
+	apmu@e6152000 {
+		compatible = "renesas,r8a73a4-apmu", "renesas,apmu";
+		reg = <0 0xe6152000 0 0x88>;
+		cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 	};
 
 	gic: interrupt-controller@f1001000 {